Jobs
Sr. Field Applications Engineer for Real Intent at Sunnyvale, CA
Sr. FAE FRONT END VALLEY for EDA Careers at San Jose, CA
SW Developer Physical space for EDA Careers at San Jose, CA
Sr Memberand MTS for EDA Careers at San Jose, CA
Sr. R&D Engineer for Real Intent at Sunnyvale, CA
Applications and Technical Marketing Engineer for E-System Design, Inc. at San Jose, CA

Tech & White Papers
The integrated EDA tool suite from Tanner EDA, Incentia and Aldec is helping a growing ASIC design house keep design costs down and design efficiency high - with no …
Mastering the Magic of Multi-Patterning, Mentor Graphics Multi-patterning technology was introduced at the 20 nm node to overcome lithographic limitations in current IC manufacturing processes. While …
Pattern Matching: Blueprints for Further Success, Mentor Graphics Design patterns have a wide variety of applications in the design, verification and test flows of IC development. From significantly reducing rule …
Upcoming Events
Virtualize! at 1333 Bayshore Highway Burlingame CA - Oct 30, 2014
LA/OC Expo and Tech Forum at The Grand Event Center 4101 E Willow Street Long Beach CA - Nov 6, 2014
3D ASIP Conference at The Hyatt Regency San Francisco Airport 1333 Bayshore Highway Burlingame CA - Dec 10 - 12, 2014
2015 European 3D TSV Summit January 19-21, 2015 Grenoble (France) at MINATEC innovation campus 3 parvis Louis Néel Grenoble France - Jan 19 - 21, 2015
Editorial
Peggy AycinenaIP Showcase
by Peggy Aycinena
IoT: the A-to-Z of TechTalk at ARM TechCon
More Editorial  
Latest Blog Posts
Tom Anderson, VP of MarketingThe Breker Trekker
by Tom Anderson, VP of Marketing
Performance Verification: Bringing Your SoC to Its Knees
Krzysztof SzczurAldec Design and Verification
by Krzysztof Szczur
How HES™ Technology Solved Problems for These Users
Colin WallsEmbedded Software
by Colin Walls
Product quality: belief or proof?
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