Field Applications Engineer for Real Intent at Sunnyvale, CA

Senior SW Developer RF Circuit Simulation for EDA Careers at San Jose, CA

Strategic Account Manager for Atrenta at San Jose, CA

R&D Director/Product Manager/ANALOG for EDA Careers at San Jose, CA

Sr. Field Applications Engineer (San Jose, CA & Austin, TX) for Atrenta at San Jose, CA

Emulation Applications Engineer for Mentor Graphics at Fremont, CA

The EDA & MCAD/MCAE Almanac: Q2 2011
Latest post : May 20, 2013, 4:59:pm
EDA User News and Reviews

PLDA - The PLDA SoMZ-7045 (based on the Xilinx Zynq AP SoC) combines the flexibility and ease …

CAST - Implements a Real Time Transport Protocol (RTP) hardware stack that encapsulates …

Arasan Chip Systems, Inc. - The Arasan USB 2.0 PHY IP core is a transceiver compliant with the …

Posedge Inc - The Posedge Quad Serial Flash Controller (PE-SFC) IP provides an interface to …

Digital Core Design - DμART, the newest IP Core mastered by Digital Core Design, is one of …

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HES-7 ASIC Prototyping, Aldec Co-authored by: Slawek Grabowski and Zibi Zalewski, Aldec, Inc. & Kirk Saban, Xilinx, Inc. This paper highlights possibilities of ASIC …

Fundamentals of Floor Planning A Complex SoC, Kilopass Floor planning is among the most crucial steps in the design of a complex system-on-a-chip (SoC), as it represents the tradeoffs between marketing objectives …

Design of Tunable Metamaterial Operating Near 90 GHz, Comsol Featured Paper by K. Tarnowski & W. Salejda Currently there is much interest in electromagnetic metamaterials [1-9]. In our work we have focused on design …

Michigan Expo & Tech Forum - May 23, 2013 at To Be Decided - May 23, 2013

DAC 2013 at Austin Convention Center Austin TX - Jun 2 - 6, 2013

e Golden Reference Guide, by Doulos.

PSL Golden Reference Guide, by Doulos.

Microprocessor Design - Preface, by Grant McFarland.

Electronic Filter Design Handbook - Preface, by Arthur Williams, Fred J. Taylor.