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Sr. Field Applications Engineer for Real Intent at Sunnyvale, CA
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Sr. R&D Engineer for Real Intent at Sunnyvale, CA
Applications and Technical Marketing Engineer for E-System Design, Inc. at San Jose, CA

Tech & White Papers
The integrated EDA tool suite from Tanner EDA, Incentia and Aldec is helping a growing ASIC design house keep design costs down and design efficiency high - with no …
SpyGlass Flow for XILINX FPGA, Atrenta SpyGlass Lint and CDC are critical analysis tools for RTL designs that identify chip killer problems and shorten design cycle time. This document highlights the issues …
Using Plots for HDL Debugging as a Powerful Alternative to Traditional Waveforms, Aldec, Inc. The most commonly used approach to analyzing objects in an HDL design, is based on the well-known digital waveforms available with any commercial simulator today. …
Upcoming Events
CDNLive Boston - Registration Now Open! at Westford Regency Inn and Conference Center Westforc MA - Sep 16, 2014
CDNLive Austin - Registration Now Open! at Hilton Austin TX - Sep 18, 2014
TowerJazz Global Symposium – September 18 – Amsterdam at NH Amsterdam Centre, Stadhouderskade 7, Amsterdam Netherlands - Sep 18, 2014
IPC India 2014 at electronica India & productronica India 2014 at Bangalore International Exhibition Centre (BIEC) Bangalore India - Sep 23 - 25, 2014
Featured Video
Editorial
Peggy AycinenaIP Showcase
by Peggy Aycinena
9/11: Jim Hogan and My father’s shoes
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Latest Blog Posts
Colin WallsEmbedded Software
by Colin Walls
Small or fast?
Tom Anderson, VP of MarketingThe Breker Trekker
by Tom Anderson, VP of Marketing
See Breker at Four Shows in Four Locations over Four Weeks
Jin ZhangDecoding Formal
by Jin Zhang
Using Formal for Functional Coverage
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Strategies for Creative Problem Solving (2nd Edition) , by H. Scott Fogler, Steven E. LeBlanc.



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