Jobs
Sr. Field Applications Engineer, CA for Real Intent at Sunnyvale, or San Diego, CA
P&R SW Developer AUSTIN for EDA Careers at San Jose, CA
Engineering Technology Director for Atrenta at San Jose, CA
Account Managers California TX for EDA Careers at San Jose, CA

Tech & White Papers
FPGA-based prototypes work with electronic system level (ESL) design environments to refine, validate and implement chip architecture1,2, and with …
Atrenta SoC Realization, Atrenta, Inc. This White Paper deals with the way SoCs are designed, a process of substantial complexity. This design process is undergoing significant transformation, …
Reduce Verification Complexity in Low/Multi-Power Designs, Mentor Graphics Verification requirements are growing in all market segments. Ensuring these requirements are met requires design verification that goes beyond traditional design rule …
Upcoming Events
Electronic Design Process Symposium (EDPS) at Monterey Beach Hotel CA - Apr 23 - 24, 2015
The IEEE Women in Engineering International Leadership Conference at 301 South Market St. San Jose CA - Apr 23 - 25, 2015
Silicon Sunrise (at Sunset) Startup Event at Avaya Stadium 1123 Coleman Ave San Jose CA - Apr 30, 2015
ASYNC 2015 May 4-6, 2015 Mountain View CA at S.F.V. Lodge 361 Villa St Mountain View CA - May 4 - 6, 2015
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Latest Blog Posts
Tom Anderson, VP of MarketingThe Breker Trekker
by Tom Anderson, VP of Marketing
The Ever-Changing EDA Landscape
Colin WallsEmbedded Software
by Colin Walls
OS influence on power consumption
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Books For Sale
The Art of Electronics , by Paul Horowitz, Winfield Hill.
SpyGLASS by Atrenta
Cadence: Innovus Implementation System - Get White Paper
DAC2015 Register Today & Save June 7-11, Early Registration Ends May 12th
Senior Developer EDA skill but NOT EDA



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