"2010: Easier Statistical Timing Analysis", Ruben Molina Extreme DA

"Conference Preview", Prof. Luca Benini, General Chair DATE Conference 2009

	Russ Henke EDA Weekly Agilent EEsof EDA – Part I :After devoting the first three issues of EDA Weekly under this writer's byline to "The Role of Business …
Archived Weeklys

	Mark Gilbert Careers Corner Three cheers for 2010!!! Is there anyone not cheering the end of 2009? Fact is 2009 ended strong, and prospects for 2010 look even better…
Archived Carrers Corner

	Dr. Russ Henke EDA & IP Commentary EDA Industry Update December 2009 -- What did the Last Quarter Bring?
Archived Commentary

FPGA Floorplanning

MT-032: Ideal Voltage Feedback (VFB) Op Amp

MT-048: Op Amp Noise Relationships: 1/f Noise, RMS Noise, and Equivalent Noise Bandwidth

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Advanced On-chip-variation Timing Analysis for Nanometer Designs, Part II, Incentia Traditional on-chip-variation (OCV) using a constant derating factor may impose unnecessary performance penalties on nanometer designs. These penalties …

GuideWare™, Atrenta Advances in silicon technology have enabled unprecedented levels of integration in today's SoC designs. This white paper describes typical issues faced by designers in a …

Jasper Design Delivers Targeted ROI, Jasper Design Automation Jasper Design Automation deploys advanced formal verification technology for the competitive advantage of its customers, across the SoC design cycle …

Prototron Circuts Corporate Presentation, Prototron Circuits Prototron Circuits is the leading prototype and quick-turn printed circuit board manufacturer providing time to market solutions to industry leaders. …

Management IntroductionCompany Presence Product Overview, Real Intent, Inc. Real Intent offers automatic verification solutions using innovative formaltechniques in an easy to use methodology, solving critical problems with …