Jobs
Design Verification Engineer for Cirrus Logic, Inc. at Austin, TX
Principal PIC Hardware Controls Engineer for Infinera Corp at Sunnyvale, CA
Senior PIC Test Development Engineer for Infinera Corp at Sunnyvale, CA
Senior SW Developer for EDA Careers at San Jose, CA
DSP Tools Engineer for Cirrus Logic, Inc. at Austin, TX
Senior Formal FAE Location OPEN for EDA Careers at San Jose or Anywhere, CA
Books For Sale
Power Distribution Networks with On-Chip Decoupling Capacitors , by Renatas Jakushokas, Mikhail Popovich, Andrey V. Mezhiba, Selçuk Köse, Eby G. Friedman.
Digital Systems Design Using VHDL , by Jr. Charles H. Roth, Lizy K. John.
Upcoming Events
IC Open Innovation Panel During REUSE 2017 at Santa Clara Convention Center 5001 Great America Parkway Santa Clara CA - Dec 14, 2017
Essentials of Electronic Technology: A Crash Course at Columbia MD - Jan 16 - 18, 2018
Essentials of Digital Technology at MD - Feb 13 - 14, 2018
Aldec Simulator Evaluate Now

Editorial
Peggy AycinenaIP Showcase
by Peggy Aycinena
Sonics: Leading the industry by example
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Latest Blog Posts
Adnan Hamid, CEO of BrekerThe Breker Trekker
by Adnan Hamid, CEO of Breker
Solution = Standard + Tool
Sunil SahooAldec Design and Verification
by Sunil Sahoo
Plots: A New Way To Analyze Data
Bob Smith, Executive DirectorBridging the Frontier
by Bob Smith, Executive Director
WIT and Wisdom in the Age of Artificial Intelligence
Colin WallsEmbedded Software
by Colin Walls
Who needs a Web server?
Tech & White Papers
Overcoming Timing Closure Issues in Wide Interface DDR, HBM and ONFIs Subsystems, True Circuits, Inc. In wide chip interfaces like DDR, HBM and ONFI, it can be challenging to synthesize and connect high-frequency controllers to the PHY hard macros. Clock trees can be …
The Secret to Building IP at the Cutting Edge, True Circuits, Inc. At 7nm and beyond, the cost and time to develop IP is very high. To gain a suitable return, it's critical to have an efficient design methodology that produces a …
Three Things you need to know to use the Accellera PSS, Cadence Three primary considerations for adopting Accellera Portable Stimulus Standard (PSS) are understanding the following: the value and relevance of this minset; and …
Upcoming Events
IC Open Innovation Panel During REUSE 2017 at Santa Clara Convention Center 5001 Great America Parkway Santa Clara CA - Dec 14, 2017
Essentials of Electronic Technology: A Crash Course at Columbia MD - Jan 16 - 18, 2018
Essentials of Digital Technology at MD - Feb 13 - 14, 2018
Featured Video
Editorial
Peggy AycinenaIP Showcase
by Peggy Aycinena
Sonics: Leading the industry by example
More Editorial  
Latest Blog Posts
Adnan Hamid, CEO of BrekerThe Breker Trekker
by Adnan Hamid, CEO of Breker
Solution = Standard + Tool
Sunil SahooAldec Design and Verification
by Sunil Sahoo
Plots: A New Way To Analyze Data
Bob Smith, Executive DirectorBridging the Frontier
by Bob Smith, Executive Director
WIT and Wisdom in the Age of Artificial Intelligence
Colin WallsEmbedded Software
by Colin Walls
Who needs a Web server?
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