Attend Synopsys' 2005 Verification Seminars
Featuring the Discovery Verification Series
March through July 2005
Learn how you can achieve higher verification quality and productivity with proven verification methodologies using the Synopsys Discovery Verification Platform. The seminars will span the system, block and chip levels and will cover Synopsys' Reference Verification Methodology, including assertion-based and coverage-driven verification, Native Testbench, IP, and mixed-signal verification. Synopsys Scientist Janick Bergeron will be a featured speaker on 4/6, in Santa Clara, CA.
For more information on our seminars, please visit our website.
Topics to be covered include:
- System, Block and Chip-Level Verification
- Reference Verification Methodology
- Assertion-Based Verification
- Coverage-Driven Verification
- Mixed-Signal Verification
Dates and Locations:
*Janick Bergeron will be a guest speaker at this location.
- April 05 - Munich, Germany
- April 06 - Santa Clara, CA*
- April 07 - Herzelia, Israel
- April 12 - Hillsboro, OR
- April 13 - Bloomington, MN
- April 13 - Tokyo, Japan
- April 19 - Noida, India
- April 19 - Somerset, NJ
- April 21 - Columbia, MD
- April 21 - Hyderabad, India
- May 17 - Toronto, Ontario, Canada
- July 19 - Orlando, FL
- July 20 - Palm Bay, FL
Trademarks/Copyright 2005 Synopsys, Inc. All Rights Reserved.
Synopsys, Inc. | 700 E Middlefield Rd | Mountain View CA 94043
UNSUBSCRIBE: If you no longer wish to receive Verification updates from Synopsys, please click here.
You are registered as: [_EMAIL_].
CafeNews is a service for EDA professionals. EDACafe respects your online time and Internet privacy. Edit or Change my newsletter's profile details. Unsubscribe from EDACafe.com sponsor newsletter.
Copyright © 2016, Internet Business Systems, Inc. — 595 Millich Dr., Suite 216 Campbell, CA 95008 — +1 (408)-337-6870 — All rights reserved.