This email contains HTML. If it does not display properly, go to:

2006 VA Email Blast

New Issue of Verification Avenue!

The Synopsys Verification Avenue - A technical bulletin for design and verification engineers with the latest product updates, in-depth technical articles and Q&As.

Issue highlights include:

  • SystemVerilog for e Experts: Understanding the Migration Process
  • SystemVerilog for Efficient Collection of Coverage Information
  • Deploying the Right Tools for Mixed-Signal Simulation
View the latest issue!

Subscribe now to automatically
receive the latest issue!

Synopsys Users Group (SNUG)
Boston, September 18-19, 2006

This year SNUG has added nine verification user papers, five tutorials and one panel. Several sessions and demos will focus on using SystemVerilog for projects today.

  • Transaction-Level Modeling in SystemC™ and SystemVerilog
  • Debugging with the Discovery Visualization Environment
  • Constraints and Scenario Generation
  • Directed to Random: A Verification Methodology Shift Using SystemVerilog Testbench Constructs
  • SystemVerilog Event Regions, Race Avoidance and Guidelines
  • VMM for SystemVerilog

Register Now

Trademarks/Copyright 2006 Synopsys, Inc. All Rights Reserved.

UNSUBSCRIBE: If you no longer wish to receive Verification Avenue updates from Synopsys, please send an email to To be removed from all Synopsys Marketing updates, send an email to
You are registered as: [_EMAIL_].

CafeNews is a service for EDA professionals. EDACafe respects your online time and Internet privacy. Edit or Change my newsletter's profile details. Unsubscribe from sponsor newsletter.

Copyright © 2016, Internet Business Systems, Inc. — 595 Millich Dr., Suite 216 Campbell, CA 95008 — +1 (408)-337-6870 — All rights reserved.