EDACafe.com - Intellectual Property : Digital Core Design


Part Number :	DI2CM
Overview :
I2C is a two-wire, bi-directional serial bus that provides a simple and efficient method of data transmission over a short distance between many devices. The DI2CM core provides an interface between a microprocessor / microcontroller and an I2C bus. It can work as a master transmitter or master receiver depending on working mode determined by micro-processor/microcontroller. The DI2CM core incorporates all features required by the latest I2C specification including clock synchronization, arbitration,
Features :	- Conforms to v.2.1 of the I2C specification - Master operation - Master transmitter - Master receiver - Support for all transmission speeds - Standard (up to 100 kb/s) - Fast (up to 400 kb/s) - High Speed (up to 3,4 Mb/s) - Arbitration and clock synchronization - Support for multi-master systems - Support for both 7-bit and 10-bit address-ing formats on the I2C bus - Interrupt generation - Build-in 8-bit timer for data transfers speed adjusting - Host side interface dedicated for micro-processors/microcontrollers - User-defined timing (data setup, start setup, start hold, etc.) - Fully synthesizable - Static synchronous design with positive edge clocking and synchronous reset - No internal tri-states - Scan test ready
Categories :	Controller
Portability :	ASIC FPGA FPGA Technologis Altera : APEX 20KC APEX 20KE APEX II Arria GX Arria II GX Cyclone Cyclone II Cyclone III FLEX 10K HardCopy HardCopy II HardCopy Stratix MAX II Stratix Stratix GX Stratix II Stratix II GX Stratix III Stratix IV Lattice : ispClock ispMACH 4000 LatticeEC/ECP LatticeECP2 LatticeECP2M LatticeECP3 LatticeSC LatticeSCM LatticeXP LatticeXP2 MachXO MachXO2 Platform Manager Power Manager II Xilinx : Artix-7 Kintex-7 Kintex-7 -2L Spartan-3 Spartan-3 XA Spartan-3A Spartan-3A DSP Spartan-3A DSP XA Spartan-3A XA Spartan-3AN Spartan-3E Spartan-3E XA Spartan-6 Spartan-6 -1L Spartan-6 HXT Spartan-6 LX Spartan-6 LXT Spartan-6 XA Spartan-6 XC Virtex-4 Virtex-4 FX Virtex-4 LX Virtex-4 SX Virtex-4 XA Virtex-5 Virtex-5 FX Virtex-5 FXT Virtex-5 LX Virtex-5 LXT Virtex-5 SX Virtex-5 SXT Virtex-5 TXT Virtex-6 Virtex-6 -1L Virtex-6 CXT Virtex-6 HXT Virtex-6 LX Virtex-6 LXT Virtex-6 SXT Virtex-7 Virtex-7 -2L Virtex-7 XT Virtex-7 XT Virtex-7T Virtex-II Pro Zynq-7000
Type :	Soft
Deliverables :	- Source code: VHDL Source Code or/and VERILOG Source Code or/and FPGA Netlist - VHDL & VERILOG test bench environment: Active HDL automatic simulation macros, ModelSim automatic simulation macros, NCSim automatic simulation macros, Tests with reference responses - Technical documentation: Installation notes, HDL core specification, Datasheet - Synthesis scripts - Example application - Technical support: IP Core implementation support, 3 months maintenance, Delivery the IP Core updates, minor and major versions changes, Delivery the documentation updates, Phone & email support