Jasper Design Automation Adds Tom Melham And Moshe Vardi To Its Technical Advisory Board

MOUNTAIN VIEW, Calif.—(BUSINESS WIRE)—April 22, 2008— Jasper Design Automation, the leader in successful deployment of production-proven formal verification solutions, today named Tom Melham and Moshe Vardi as the newest members of its Technical Advisory Board (TAB). Tom Melham is a Professor of Computer Science at the University of Oxford and a Fellow of Balliol College. He is well-known for his technical contributions and publications on combined model checking and theorem proving, industrial-scale hardware verification, abstraction techniques, and for integrating formal verification into hardware design methodologies. Moshe Vardi is a Professor of Computer Science at Rice University, the Karen Ostrum George Professor in Computational Engineering, and Director of the Ken Kennedy Institute for Information Technology. The author of over 300 technical papers, as well as the editor of several collections, Prof. Vardi is a renowned expert in model checking, constraint satisfaction and database theory, common knowledge (logic), and theoretical computer science.

"In my research work, I have been applying formal techniques to RTL at the micro-architecture level," stated Prof. Melham. "I am pleased to be joining the Jasper TAB to advance the technology pipeline for applying formal technologies throughout the whole design and verification cycle, from architecture to silicon. I see Jasper taking the lead in formal technology applications at the architecture level, helping chip companies alleviate the most troubling downstream design and verification challenges."

Prof. Melham received his Ph.D. in 1990 from the University of Cambridge for his foundational research in formal hardware verification and mechanized reasoning, and was a co-developer of the original HOL theorem prover for higher order logic at Cambridge. In 1993, he joined the Computing Science Department at Glasgow University. He was appointed to a Professorship of Computing Science at Glasgow in 1998, before moving to Oxford in 2002. He was elected a Fellow of the Royal Society of Edinburgh in 2002.

"Having been involved with formal verification research and development for 25 years, I am excited about joining Jasper's TAB to participate in the ongoing development and growing proliferation of formal verification across a wide variety of horizontal industry segments, stated Moshe Vardi. With the rising importance of high-level models in design, formal verification is becoming critical to the industry. I expect Jasper to play a major role in this market."

Prior to joining Rice University, Prof. Vardi was at the IBM Almaden Research Center, where he managed the Mathematics and Related Computer Science Department. Vardi is the recipient of three IBM Outstanding Innovation Awards, and a co-winner of the 2000 Gödel Prize, the 2005 ACM Paris Kanellakis Award for Theory and Practice, and the LICS 2006 Test-of-Time Award. He holds honorary doctorates from the University of Saarland, Germany, and the University of Orleans, France, and received his Ph.D. from the Hebrew University of Jerusalem in 1981.

"We are delighted to welcome Moshe and Tom to our technical advisory board, and pleased to be working with two of the industrys most respected formal verification visionaries," said Ziyad Hanna, chief architect and vice president of research at Jasper Design Automation. These two gentlemen have contributed greatly to formal verification research and development, and will help Jasper advance its formal technology leadership."

About Jaspers Technical Advisory Board

Jaspers Technical Advisory Board (TAB) is made up of verification luminaries from the academic and commercial worlds. The TABs purpose is to advise Jaspers management team on research trends in formal verification and formal technology exploration and expansion. The TAB also provides valued guidance on Jaspers technical product development, and educates students and the market on trends in formal verification.

In addition to Tom Melham and Moshe Vardi, the TAB currently includes Brian Bailey, renowned verification industry veteran; Alan Hu, associate head of the Department of Computer Science at the University of British Columbia; Sharad Malik, professor in the Department of Electrical Engineering, Princeton University; and Satoshi Goto, professor at the Graduate School of Information, Production and Systems, Waseda University, Kitakyushu, Japan.

About Jasper Design Automation

Jasper Design Automations production-proven formal verification solutions are used by logic designers, verification engineers and silicon bring-up teams to design, explore and debug RTL, to ensure correctness of block-level functionality and for rapid post-silicon validation and debug. JasperGold® Verification System delivers complete deep formal systematic verification, ensuring correctness of critical design features without any testbench development. JasperGold Express, a light formal solution, complements simulation by accelerating bug-hunting and coverage attainment. For expert help with large scale formal verification deployment, RTL exploration or post-silicon debug, please visit http://www.jasper-da.com.

Jasper Design Automation, the Jasper Design Automation logo, JasperGold, Formal Testplanner, GamePlan, Proof Accelerators, Lossless Abstractions, Formal Scoreboard, and Design Tunneling are trademarks or registered trademarks of Jasper Design Automation, Inc. All other names mentioned are trademarks, registered trademarks, or service marks of their respective companies.

1 | 2  Next Page »
Aldec

Shift Left with Calibre

Featured Video
Jobs
Electrical Engineer - ASIC/FPGA for General Dynamics Mission Systems at Florham Park, New Jersey
Advanced Mechanical Engineer for General Dynamics Mission Systems at Marion, Virginia
FPGA Design Verification Engineer for General Dynamics Mission Systems at Dedham, Massachusetts
RF Design Engineer for Blockwork IT at San Francisco, California
Senior SOC Design Engineer for Nvidia at Santa Clara, California
Senior CAD Engineer for Nvidia at Santa Clara, California
Upcoming Events
North America Technology Symposium at Santa Clara Convention Center 5001 Great America Parkway, Santa Clara, CA - Apr 24, 2024
IP-SOC Silicon Valley 24 at Hyatt Regency Santa Clara 5101 Great America Parkway, Santa Clara CA - Apr 25, 2024
MEMS & Sensors Technical Congress - MSTC 2024 at University of California, Los Angeles 405 Hilgard Avenue, Covel Commons in Sunset Village, Housing at Luskin Center Los Angeles CA - May 1 - 2, 2024
ChipEx2024 at Tel-Aviv Expo Center & Hilton Hotel Tel-aviv Israel - May 7 - 8, 2024



© 2024 Internet Business Systems, Inc.
670 Aberdeen Way, Milpitas, CA 95035
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise