The title of this issue of the EDA WEEKLY is, “The State of IP.” With apologies to the advocates (or opponents) of statehood for current United States' commonwealths or territories, this is not an article about candidates for the next (51st) US state. Nor is this article focused on the United States alone.
It is rather an article about the rapidly growing segment of the electronics industry called, “Electronics Intellectual Property” or “Electronics IP” for short.
So here are the questions to be answered:
- What is Electronics IP?
- How big is its market niche & profitability?
- How fast is the IP niche growing?
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(1) What is Electronics IP? Wikipedia provides a workable answer as follows:
In electronics design, a semiconductor intellectual property core, IP core, or IP block is a reusable unit of logic, cell, or chip layout design that is the (legal) intellectual property of one party. IP cores may be licensed to another party or can be owned and used by a single party alone. The term is derived from the licensing of the patent and source code copyrighted intellectual property rights that subsist in the design. IP cores can be used as building blocks within ASIC chip designs or FPGA logic designs.
IP cores have had a profound impact on the design of systems on a chip (SoC's). By licensing a design multiple times, IP core licensors spread the cost of development among multiple chip makers. IP cores for standard processors, interfaces, and internal functions have enabled chip makers to put more of their resources into developing the differentiating features of their chips. As a result, chip makers have developed new innovations faster.
The licensing and use of IP cores in chip design came into common practice in the 1990's. Many of the best known IP cores are soft microprocessor designs. Their instruction sets vary from small 8-bit processors, such as the 8051 and PIC to 32-bit processors such as the ARM architectures or MIPS architectures. Such processors form the "brains" of many embedded systems.
IP core developers and licensors range in size from individuals to multi-billion dollar corporations. IP development and licensing are less common in nations with lax enforcement of laws against the infringement and theft of intellectual property.
A partial list of current IP core licensors has been compiled in Wikipedia [1].
As previously implied, Electronics IP is a worldwide phenomenon; the largest independent Electronics IP supplier today is headquartered in Cambridge, England (ARM Holdings plc). While the United States is headquarters for most of the other corporate participants, virtually all of the leading Electronics IP suppliers have operations all over the world.
Of course, the well-established Big 3 Electronic Design Automation players (Synopsys, Cadence and Mentor Graphics) are very active in the Electronics IP field, and they each have recently become even more active with highly-visible IP acquisitions. Each of the Big 3 is headquartered in the United States and each has operations all over the world. Each is huge in total sales. Last year's Big 3 combined revenues were $3,015,404,000.
But with the Big 3, we encounter the first roadblock in trying to scrutinize the overall size, growth and impact of the worldwide Electronics Intellectual Property phenomenon. The problem is simply stated - the revenues and profits of the intellectual property businesses of the Big 3 are not unbundled and reported in public! Not their own IP activity that each may have started from scratch; not their acquired IP businesses either. Once an acquisition is absorbed by any of the Big 3 organisms, performance information about that acquisition ceases.
This non-disclosure practice has given rise to the wry alternative definition of Big 3 IP - namely, Big 3 “IP” equals “Invisible Performance.”
So for purposes of answering questions (2) and (3) above, we will not focus directly on the IP activity of the Big 3. To better explain looking elsewhere, a little more historical background is warranted and follows here.
Background:
Around the time that George W. Bush launched his ill-conceived IRAQ WAR with the pre-emptive Shock and Awe attack on Baghdad (i.e. March 2003), the writer received an (unrelated) phone call from Mr. Sanjay Gangal, vice president of IBSystems, Inc. and publishers of Internet newsletters such as EDAcafe.com and MCADCafe.com, among others. (Sanjay had been a key member of the engineering team at the San Jose-based PCB Division of EDA vendor Mentor Graphics Corporation during the 4+ years that the writer was VP &GM of that division in the early nineties. Sanjay was likewise aware of the writer's 20+ years of MCAD/MCAE experience prior to Mentor. The writer had departed Mentor in 1996 after six+ total years of service at MGC, to form Henke Associates. Sanjay had departed from Mentor in 1994, also after nearly six years there, taking three other positions in the SF Bay Area before joining IBSystems in 1999).
In his March 2003 phone call, Sanjay suggested that the writer and his team at Henke Associates might launch quarterly commentaries on the financial progress of leading public EDA vendors in EDAcafe.com and of leading public MCAD and/or MCAE vendors in MCADCafe.com. Sanjay offered the writer no financial incentive to encourage this effort, but rather he hinted that the ongoing exposure to the subscribers of IBSystems' publications would surely lead to future consulting assignments for Henke Associates.
Thus was the genesis of the quarterly EDA Industry Commentary and the quarterly MCAD Industry Commentary, which began to appear in May 2003. We had quickly identified nine (9) public EDA vendors along with a separate nine (9) public MCAD/MCAE vendors, to cover initially.
As if this were not enough, a few weeks later Sanjay further suggested that his readers might also be interested in a relatively new segment of electronics design called, “Electronics Intellectual Property” or “Electronics IP” for short. Since the team at Henke Associates strongly agreed that this emerging segment was indeed under-reported, we quickly acceded. In his naïve enthusiasm, the writer identified a further eight (8) public vendors in Electronics IP for launching coverage in a separate quarterly Electronics IP Industry Commentary.
Back to the Present:
Seven-plus years later, both the IRAQ WAR [2] and the quarterly EDA, MCAD and Electronics IP Industry Commentaries are still going on, the latter combined total of quarterly commentaries having just recently passed the 90-issues milestone.
The preparations of all three sets of the ninety total quarterly commentaries over the years have at once provided Henke Associates many informative, provocative, frustrating, enlightening, addictive, humbling, satisfying, and occasionally grueling hours of effort, and have resulted to date in precisely two (2) consulting assignments that can be traced directly to the efforts.
During the last seven years, four (4) of the originally-selected nine EDA vendors for the EDA Industry Commentary have since been acquired by other vendors:
… thereby leaving for continuing coverage the current Group-of-Five (G5) EDA vendors:
Four (4) of the originally-selected nine MCAD/MCAE vendors for the MCAD Commentary have also either been acquired or have gone private:
… leaving a Group-of-Five (G5) MCAD/MCAE vendors for ongoing coverage:
And last but not least, three of the originally-selected eight IP vendors for the Electronics IP Industry Commentary have been acquired:
… leaving the soon-to-be Group-of-Five (G5) IP vendors:
The Electronics IP Industry:
For the most part, the Electronics IP niche (represented by the arbitrary 2003 G8 vendor selection by Henke Associates) is even now hardly two decades old, with only MIPS having been founded before 1990. (While MIPS was originally founded in 1984, it focused for many years on building a RISC processor within Silicon Graphics before moving toward the IP game). The current incarnation of MIPS called “MIPS Technologies, Inc.” was officially “founded” in 1998.
For the record, below are listed all the founding dates in chronological order of the pre-acquisition members of the 2003-selected Group-of-Eight (G8) Electronics IP vendors:
Historically, UK-headquartered ARM has been dominant, often claiming almost two-thirds of the total group revenue in any given period. But even this picture has been changing recently, as other covered IP vendors execute their own revenue expansion strategies. (Note: the pending disappearance of Virage Logic from the ranks of these independent IP suppliers above, also removes from this list of independents one of the fastest growing IP suppliers as well [3]).
The Electronics IP Industry: Now and Then…
To see how far the Electronics IP Industry has come since 2003, the year that the Electronics IP Commentaries began to appear, let's first see where the G6 stands now in 2010, and then we'll compare the “Now” to the “Then.”
So to get started with the “Now” we provide here the Electronics IP G6 financial results for the first quarter of 2010 (and the last two quarters of 2009) that have already been published in the June 4 , 2010 IP Commentary for Q1 2010:
The Electronics IP revenue and earnings summary Tables 1 & 2 for Q1 2010 are repeated here for convenience:
Table 1 above showed that the combined G6 total revenues had ballooned to $362 million in Q1 2010, up sequentially 63.6% compared to their total of $221 million in Q4 2009, and fully 91.6% higher than the year-over-year Q1 2009 revenue total of $189 million.
While all 6 vendors grew sequentially from Q4 2009 to Q1 2010, an unusual occurrence in itself, the 425.6% Q4 2009 to Q1 2010 Rambus revenue growth anomaly was primarily caused by Samsung payments to Rambus arising from Rambus' Q1 settlement of a long-running dispute with Samsung (as was explained in detail in the Rambus-only section of the Q1 IP Commentary). It was noted that the same Samsung deal allowed Rambus to overtake ARM for the most revenue among the G6 in Q1 2010, a feat that would be difficult to duplicate, since normal Rambus quarters have commonly been in the $30 million revenue class.
As it did in the previous Q4 2009 quarter, still-independent Virage Logic claimed third place in the Q1 2010 revenue race among the G6, with its $25+ million.
MIPS delivered double digit percentage sequential growth in Q1 2010, but MIPS could not match its year-over-year Q1 2009 $17.7 million performance, with both figures consistently stated after the MIPS Analog Business Group business unit is subtracted. The other three vendors also managed sequential growth Q1 2010 over Q4 2009.
Only MIPS among the G6 in Q1 2010 did not exceed its year-over-year Q1 2009 revenue mark; ARM, CEVA, and MoSys posted double digit percentage growth year-over-year, and of course Rambus' Q1 2010 was “way better” than its Q1 2009 revenue number.
Relative to Q1 2010 Earnings, Table 2 revealed that three of the six vendors (CEVA, MIPS, and MoSys) delivered slightly less profit in Q1 2010 than in Q4 2009, quarterly sequential behavior that is classic between the change of years. But the ARM, Virage Logic, and of course Rambus' improved Q1 2010 profits easily overwhelmed the others' modest sequential reductions, such that the profitability of the G6 overall improved slightly more [$175,313,000] in Q1 10 vs. Q4 09 than the profit improvement generated by Rambus alone [$174,192,000].
Indeed, four of the six covered vendors were in black ink in Q1 2010, vs. three in Q4 2009 and only two in Q1 2009. But Rambus' Samsung deal allowed it to deliver nearly 80% of the year-over-year $212,173,000 improvement in G6 profits Q1 2010 vs. Q1 2009.
What about “Then”?
Virtually all of the previous Electronics IP Industry Commentaries are available in the Archives of EDACafe.com:
One of the very first Electronics IP Industry reports in the archives is from late 2003, when the following Revenue and Earnings tables were published:
Note that in 2003 Figure 3 and 2003 Figure 4, fully 10 quarters of Revenue and 10 quarters of Earnings were shown, starting with the first quarter of 2001. Note also that back then, (a) ARM and Artisan were still separate & independent from one another; (b) CEVA was still named “ParthusCeva” until its name change to CEVA on December 8, 2003; and (c) MoSys, Inc. was also called “Monolithic System Technology” as late as October 2002.
Note further that revenue totals for the 10 quarters show a relatively flat total revenue picture, but that total profits in 2001 were fairly handsome ($67 million for 2001 in earnings on $497.5 million in total revenues, or 13.47% on ROS. But also note that ARM and RAMBUS together accounted for $70 million of the 2001 year's $67 million earnings).
Total profits dropped to $32 million in 2002 as the first recession of the decade tightened its grip. Total 2002 G8 revenues edged up only 4.46% to $519.7 million. So the overall ROS was reduced to 6.16%. ARM and RAMBUS delivered $61 million of the total profit of $32 million, and at $326.9 in combined revenue, ARM and Rambus represented 62.9% of the of $519.7 million of total 2002 G8 revenues.
The last two columns of 2003 Figures 3 and 4 show that the G8 revenues continued relatively flat into the first half of 2003, and earnings became even worse.
Comparing Q4 2001 to Q4 2009:
Continuing, let's compare “now” and “then” by comparing Q4 2001 to Q4 2009 (Q1 2010 was rejected as a candidate for comparison due the one-time giant impact of the Samsung royalty on Rambus' revenue & profits). So to use Q4 2001 for comparison to Q4 2009, we'll first need to remove LogicVision from the Q4 2001 column and also combine ARM and Artisan:
Table 3 reveals that combined Group revenue had grown from $123+ million in Q4 2001 to $222+ million in Q4 2009, or some 80%.
However, Table 4 shows that profitability suffered (down from $20 million in Q4 2001 to $4.26 million in Q4 2009, or - 79%. (As we will soon see, Q4 2009 was the only profitable quarter for the G6 in all of 2009).
Full Year 2002 vs. Full Year 2009:
Perhaps a better comparison would be to compare a whole year (say 2002) to a whole year (2009).
Tables 5 and 6 above show that while G6 revenue grew at a CGR of 7% per year from $505.1 million in 2002 by $269 million to $773.44 million in 2009, G6 profit fell deep into negative territory by 2009 to minus $74.7 million from plus $40 million in 2002.
While the two recessions during the Bush 43 years, the second of which still burdens us all, have played roles, there is no doubt that most of the smaller IP companies were and are spending and investing for survival & growth, focusing on building stock value, seeking acquisitions and partners of their own, and looking for suitable exit strategies.
How do others report on IP?
This article up to here is all about the measurement methods generally used by the three Commentaries published quarterly by Henke Associates, with particular focus on the Electronics IP market. To describe the Electronics IP phenomena of the last decade or two, other interested groups have adopted segmentations of the Electronics IP industry for their own purposes.
One example of such an “interested group” is the Electronics Design Automation Consortium, or EDAC. Founded in 1989, EDAC is an international association of mostly companies that develop EDA tools and services which literally enable engineers to create the world's electronic products. Today EDAC sports approximately 100 member companies, an impressive list representing a large portion (but not all) of the overall electronics industry across the globe.
The total electronics industry itself is made up of all EDA, all semiconductor and all electronics systems companies in the world. While mitigated from time to time by economic slowdowns, the long term trend of worldwide demand for increasingly complex electronic products appears insatiable.
Whether or not the EDA vendors are EDAC members, the overall EDA industry's software & computational products and services “make it possible for the world's electronic companies to keep up with demand for smaller, faster, more powerful, and lower cost electronic products that enable the Information Age, including communications, computers, space technology, medical and industrial equipment and consumer electronics,” says the EDAC web site.
Among EDAC's value-added programs is its sponsorship of EDA technical conferences, including moral support and partial financial support of such well-known events as the annual Design Automation Conference (DAC) in the United States, and the Design Automation and Test Europe (DATE) conference held in Western Europe.
Of more specific interest for this article is EDAC's Market Statistics Service (MSS). The MSS began in 1994 to provide access to certain quarterly EDA revenue data for its members. Of specific interest to us, the MSS also issues free public news releases on a quarterly basis that summarize the amalgamated quarterly revenues of its member companies, including creating and updating the colored graph in Figure 1 below:
While usually published three months or so in arrears, the MSS report not only provides quarterly data about the lion's share of worldwide total EDA revenue, but also it includes revenue segmentation of specific relevance to this EDA WEEKLY article - namely, Semiconductor Intellectual Property (SIP) revenue (the segment shown in “pink” in Figure 1 above).
That the SIP revenue category has grown to become a larger and larger percentage of the total MSS EDA revenue is qualitatively observable in Figure 1 above and in Figure 2 below, and the SIP percentage is confirmed by the statistical numerical data of Table 7.
SIP now represents between 20% and 25% of MSS tracked total EDAC members' Revenue, and at $320.9 million was the second largest category in Figure 1 for Q1 2010 - the last quarter for which MSS data were available.
+ Revenue growth year to year is slightly affected by current MSS members' actual revenue growth plus the revenue of including contributions from the periodic addition of new MSS members
* MSS began to include SIP revenue data from public sources in 2004 as well as that reported by MSS members.
** MSS data available for Q1 2010 only. Q2 2010 MSS data will be released on or about October 1, 2010.
EDAC MSS data -- advantages and disadvantages:
Advantages:
1. With nearly 100 companies as members, the MSS report provides visibility on a meaningfully-large portion of the EDA Industry's total quarterly revenue performance, allowing a reasonably-accurate picture of the macro-economic health of the entire EDA Industry.
2. Reasonably long historical revenue data trail - MSS started in 1994.
3. Provides revenue data for five specific segments of member revenues, with exacting specifications and definitions as to what type of data are collected within each category. See for example one sample section the specifications for the category of “Semiconductor IP” of particular importance to this article in Footnote [4].
4. Publishes at no charge the total EDA revenue data collected from its members, along with the sub-total revenue data in the five (5) major categories. Also publishes a multi-colored graph (Figure 1) wherein macro trends are visible (e.g. Semiconductor IP as a % of the total; the overall EDA revenue decline since the 2008 peak, etc.).
Disadvantages:
1. Data are limited to revenue only, no profitability data are visible.
2. Results are at least three months in arrears of close of each quarter.
3. Full data reports are available only to members of EDAC. Further, it is believed that a member can see only marco-data but not specific company-by-company data, owing to MSS confidentiality rules.
4. The year-by-year EDAC MSS news releases provide revenue data for the MSS membership as it exists that year. Thus the total revenue number for that year might show growth solely due to adding in the results of new members, even though for example the revenues enjoyed by each member may have declined for that year. It is assumed that revenue history is adjusted and back-calculated for MSS members, to mitigate that effect in each current report of historical revenue performances, but the adjustment is not available those dependent on MSS public news releases alone.
As mentioned earlier in the EDA WEEKLY, the writer has historically been unable to determine if and where the Big 3 EDA vendors (Synopsys, Cadence and Mentor Graphics) publish in their public quarterly financials the amount of their revenues due to IP in total, let alone the breakdown their revenues into any of the five MSS categories. Thus the revenue details associated with IP even within this “oligopoly of three” that dominates the total revenue of the EDA industry, is not visible in the writer's articles or in the public MSS press releases[6]. The writer assumes that the Big 3 are MSS members but cannot be sure to what extent the IP revenue of the Big 3 is included in revenue reports available to EDAC members.
Status:
1. So from the original G8 reports in the quarterly Electronics IP Industry Commentaries, we lost the visibility into LogicVision's revenue and profit performance once LogicVision was acquired by Mentor Graphics in 2009. Virage Logic's acquisition by Synopsys for $315 million (or approximately $289 million net of cash acquired) will swallow up any future visibility of Virage's quarterly revenue and profit data soon; indeed, there may well be no Q2 2010 financial report from Virage Logic. Denali Software, Inc. did not publish its financials in the past, so number-wise its disappearance into Cadence is a wash. We do know that Cadence paid $315 million cash for Denali, so Denali was arguably as large as Virage Logic.
2. And we have seen that there is no profitability data at all in the public news releases from the EDAC MSS.
Alas, it's this absence of IP financial data from the Big 3 and the absence of IP profitability data from the public MSS data that frequently elicits the second wry definition of IP by some observers as standing for “Invisible Profits”.
For knowing profitability is critical information. Choose the combined revenue & profitability of the Electronics IP Industry Commentaries for 2009 as an example. Even with growth of the IP Revenue reported for the G6 in 2009 over 2002, as well as consistent profitability in each quarter of 2009 by ARM and by CEVA, and two quarters out of four by MIPS, the combined G6 delivered losses in three of the four quarters, with only Q4 2009 squeezing barely into the black, ending the 2009 year with a nearly $75 million loss for the G6 combined:
Of course, there's occasionally an anomaly quarter such as Q1 2010, when Rambus' settlement with Samsung created a Rambus profit of over $150 million, a number whose size may erase all the 2010 losses for the remaining G5 for the entire year.
The weakness of the Electronics IP Commentary reports is of course that the set of IP vendors covered is only a slice of the overall IP Industry, and as a result much of the total IP Industry financial data are simply inaccessible.
[1] Footnote: A list of existing IP core vendors from Wikipedia is massive; and the list is divided into some 20 categories already:
- 1 Analog-to-Digital Converters
- 2 Broadband modem and error correction
- 3 Digital Audio
- 4 DRAM controllers
- 4.1 DRAM PHYs
- 5 Ethernet interface controllers
- 5.1 Ethernet PHYs
- 6 General purpose microprocessors
- 7 HDMI
- 8 ISP
- 9 I/O pad libraries
- 10 NAND Flash memory controllers
- 10.1 NAND Flash memory PHYs
- 11 On-chip SRAMs
- 12 On-chip non-volatile memory
- 13 Phase Locked Loops (PLLs)
- 14 Security
- 15 Serial ATA (SATA) controllers
- 16 Standard cell libraries
- 17 USB controllers
- 18 Video processors and computer graphics
- 19 Video Decoder
- 20 WiFi interface controllers
[2] Footnote: The war in IRAQ started pre-emptively by G.W. Bush over seven (7) years ago in March 2003, is hardly close to being successful or over, as this recent news release attests:
-
Al-Qaida plants flag in Baghdad as 23 die in Iraq
BAGHDAD - Al-Qaida briefly planted its flag in Baghdad on July 29, 2010 as militants killed 23 members of Iraq's security forces across the country in a combination of shootings and roadside bombs demonstrating the dangers the country still faces, despite Bush's departure from the U.S. presidency some 19 months ago, and 88 months since Bush declared “Mission Accomplished” in IRAQ.
The worst July 26, 2010 attack came in Baghdad's Sunni neighborhood of Azamiyah when 16 Iraqi security forces were killed by what appeared to have been coordinated strikes by al-Qaida militants, who then planted their flag close to the blood-soaked site. The daylight attack on the northern district, once an insurgent stronghold, was the boldest move by militants since their commando-style assault on the Central Bank in June 2010 that left 26 people dead during morning rush hour.
It also suggests the insurgents are looking to regain some sort of foothold in at least part of the capital as the U.S. military presence diminishes and Iraqi security forces still struggle to keep the peace without the ongoing promise of American backup.
The Azamiyah attack came in what was already a deadly day for Iraq's security forces, which are increasingly being targeted by insurgents as all but 50,000 U.S. troops prepare to leave the country by the end of August, a commitment made by President Barack Obama soon after he was elected at the end of 2008, thereby ceasing the open-ended commitment to stay that his predecessor had made. All American troops are set to leave Iraq by the end of 2011.
The president is also committed to starting the draw-down the U.S. combat troop involvement in Afghanistan in 2011, a date that would make American involvement in that war 11 years in duration and counting.
[3] Footnote: The Synopsys acquisition of Virage Logic:
On June 10, 2010 Synopsys, Inc. and Virage Logic Corporation announced that they had signed a definitive agreement for Synopsys to acquire Virage Logic. Synopsys said that Virage Logic's offerings will complement Synopsys' DesignWare® interface and analog IP portfolio by adding embedded memories with test and repair, non-volatile memories (NVMs), standard cell libraries, and programmable cores for control and multimedia sub-systems. With this acquisition, Synopsys will add to its ability to help design teams achieve their system-on-chip (SoC) development goals by providing them with a more comprehensive portfolio of production-proven, high-quality IP and worldwide technical support.
Assuming consummation of the terms of the agreement, Synopsys will pay $12.00 cash per Virage Logic share, resulting in a transaction value of approximately $315 million, or approximately $289 million net of cash acquired. The transaction is still subject to regulatory and Virage Logic shareholder approval, as well as other customary closing conditions.
The boards of directors of both companies have already approved the transaction, under which current Virage Logic President and CEO Alex Shubat will join Synopsys. After the closing, Virage Logic will become part of Synopsys, and Virage Logic stock will cease trading. The transaction is expected to close in the fourth quarter of Synopsys' fiscal 2010 (i.e. between November 1, 2010 and January 31, 2011). Therefore, Synopsys anticipates the transaction will be neutral to its non-GAAP earnings per share in fiscal 2010, and accretive in fiscal 2011 (i.e. beyond January 31, 2011). "With more functionality being integrated into a single device, high-quality IP continues to be key for enabling designers to reduce integration risk and speed time-to-market," said Dr. Aart de Geus, chairman and CEO at Synopsys. "Bringing Synopsys and Virage Logic together broadens our portfolio and builds on two very strong technical teams. It is also in line with what so many customers are looking to Synopsys to address: a way to quickly incorporate standard functions into their SoCs so they can focus on developing differentiated products."
"When I co-founded Virage Logic in 1996, it was with the belief that a semiconductor IP company could provide the technically superior building blocks that the industry needed to accelerate development of high quality, cost-effective end products," said Dr. Alex Shubat, president and CEO of Virage Logic."Today, the transition to a fabless, or 'fab-lite' model, coupled with the explosion in SoC product development costs at the advanced process nodes, has resulted in an escalating need by the semiconductor manufacturers for production-proven IP. By joining forces with Synopsys' impressive engineering team and by gaining access to their global channel, we will be able to accelerate the development and delivery of our broad product offering to help customers meet their design-for-profitability goals. I am excited to join Synopsys to further my original vision."
[4] Footnote: Sample section of EDAC MSS specs for reporting SIP revenue (one of multiple pages):
5.1.4 SIP Management: Software tools for SIP database management, delivery, and publishing.
5.1.5 Royalty-Based SIP: Semiconductor intellectual property that does not fit into any previously defined category, and/or revenue obtained for the "right to use" of intellectual property in the development or manufacture of a semiconductor. Examples of "right-to-use" intellectual property include royalty fees paid for the use of an EDA tool, or fees paid for a license to manufacture using intellectual property in the form of a unique methodology, process recipe, architecture, or other proprietary technology. Specific examples include royalty fees paid for the right to incorporate an OPC technology into a design, or the right to include BIST technology into a design, paid for in the form of a royalty.
5.1.6 Library Characterization: Software tools used to characterize standard cells, I/O, macro or memory SIP and generate the timing, noise and power libraries required for analysis, synthesis and physical implementation tools.
5.2 Macrocells and Cores
5.2.1 Physical Libraries: The class of building blocks or elements used to assemble or compile a virtual component into a particular target process. The library provides a physical representation of the logic and functional elements of the design.
5.2.2 Memory Elements: Any storage element, from circular buffers and memory cells up to complete memory blocks.
5.2.3 Non-Volatile Memory: Memory that retains its state without any power supplied.
5.2.4 Analog and Mixed Signal: An IP block or virtual component with circuitry that provides analog functionality, usually requiring additional considerations over standard digital SIP.
5.2.4.1 RF: Virtual components and interfaces for wireless radio-frequency physical media interfaces.
5.2.4.2 Components: Includes A/D, D/A, comparators, amplifiers, detectors, pulse compression, sources, switches, PLL/VCO, reference/regulators, pulse-width modulators, and other components.
5.2.4.3 Signal Processing: Includes filters, couplers, doppler, target and clutter, mixers, and multipliers/dividers.
5.2.5 Arithmetic, Mathematic, and Logic Functional Blocks
5.2.6 Interface/Peripheral Cores: Interfaces and peripherals (in the form of software or RTL) that conform to recognized standards, or which perform standard functions such as timers or keyboard controllers.
[5] KEY DEFINITIONS: COMPLETE LIST:
A partial list is included below as a sample. Click on the URL above for the complete list.
IP (Intellectual Property)
A broad category of written and electronic material that is legally recognized as proprietary to a specific organization. In the electronics field, intellectual property refers to specific portions of a chip or “building blocks” which may be proprietary and/or patented designs of a particular company. These reusable blocks or “cores” may be made available commercially to others as portions of new designs. See also SIP (Semiconductor Intellectual Property) and VC (Virtual Component).
SIP (Semiconductor Intellectual Property)
A block of a design or testbench that can be reused. Also known as a virtual component.
SoC (System on Chip)
A single chip on which multiple specialized blocks of logic have been combined. These blocks, which consist of Semiconductor Intellectual Property (SIP), may be sourced from a company's internal portfolio, or from commercial providers who are external to the company.
testbench
A custom model of the system environment used during the verification of a design to provide simulation inputs and respond to simulated outputs from the design under test.
VC (Virtual Component)
A reusable block of semiconductor intellectual property (SIP). VCs may be soft (synthesizable), firm (parameterizable), or hard (where the layout is fixed, with only the I/Os visible to the design tools).
[6] Footnote: The author of this issue of EDA WEEKLY entitled, "The State of IP" was pleased to receive an email from one Yvette Huygen Deshpande, Director, Worldwide PR & Corporate Communications, Synopsys, Inc. on August 18, 2010. Yvette kindly pointed out that in a supplement to its standard quarterly financial reports, Synopsys did indeed publish the revenue results of several categories of its Product Groups, of which "IP & Systems" is one.
Synopsys defines this product category as "Intellectual Property and System-Level Solutions." Synopsys' IP portfolio provides customers with silicon-proven digital, PHY, analog and verification IP for SoC designs to reduce their design risk and time-to-market. Its IP solutions include the DesignWare® Library of infrastructure IP, VCS Verification Library of popular chip function models, and DesignWare Cores, which are pre-designed and pre-verified digital logic and mixed-signal blocks that implement important industry standards, including USB, PCI Express, DDR, SATA, HDMI, Ethernet and MIPI. Its analog IP solutions include analog-to-digital converters, digital-to-analog converters, audio codecs, video analog front ends and touch screen controllers. Our System-Level solutions enable customers to, among other things, accelerate verification and embedded software development. These solutions include Synopsys virtual prototyping portfolio and Confirma™ Rapid Prototyping System, the portion of the Certify®, Identify Pro, and Synplify Premier software tools used for system verification, and Synphony High Level Synthesis.
Analysis & Comments by the EDA WEEKLY writer:
This quarterly Synopsys supplement is made available only for one quarter, and then it's replaced by the next quarter's supplement. Upon request, however, Yvette was able to supply the writer of this EDA WEEKLY with some additional data starting in 2006. These data are summarized here (keeping in mind that Synopsys' fiscal years terminate at the end of October each year):
Comment #1: Note from Table 6A that "IP & Systems" revenue recognized by Synopsys has increased steadiy as a percent of total Synopsys revenue through each the full years reported, from 7.84% of total revenue in FY 2006 to 10.65% in Fiscal 2009, and it is averaging 13.30% of Synopsys actual revenue through three quarters of FY 2010.
Comment #2: Among the four segments into which Synopsys has chosen to split its total revenue for supplementary reporting purposes, the revenue from the "IP & Systems" segment has reached and eclipsed the "Manufacturuing" segment in total revenue for the first three quarters of FY 2010, to become the second highest revenue producer next to the traditional leader -- the Synopsys "Core EDA" segment:
Comment #3: Revenue recognition in FY 2010 Q4 from recent IP acquisitions, such as Virage Logic, is likely to increase the full 2010 fiscal year revenue number percentage for "IP & Systems" faster than it increases total Synopsys revenue, which may mean an even higher YE percentage of "IP & Systems" revenue as a percent of total Synopsys revenue than 13.30% for the full FY 2010.
Comment #4: While the supplemental Product Segments revenue reports are both welcome and extremely useful, one immediately craves the corresponding earnings data, which remain unreported in Synopsys' supplements just as they are unreported in EDAC quarterly new releases. One may also desire further segmentation into the inidividual product by product contents of each of the four Product Segments chosen by Synopsys for both revenue and profitability. It would also be useful to see these data for Synopsys' fiscal years earlier than 2006 as well.
Comment #5: The writer would welcome similar reported data from Cadence & Mentor Graphics, and if the data already exist, the writer would appreciate directions on where to them.
Again, great thanks to Synopsys' Yvette Huygen Deshpande for her readership, interest and action in supplying the available Synopsys data used in the foregoing.
Acknowledgments:
The writer would like to acknowledge the sources of data and information for this EDA WEEKLY of August 16, 2010: Vendor News Releases; Hoover's; Yahoo! Finance; Google Finance; and Wikipedia. Ongoing support by the team at IBSystems, Inc., including but not limited to Sanjay Gangal, Adam Heller, David Heller, Jon Heller, Nitai Fraenkel, and Sumit Singhal, is also appreciated.
About the Author of this August 16, 2010 EDA WEEKLY article:
Since 1996, Dr. Russ Henke has been and remains active as president of HENKE ASSOCIATES, a San Francisco Bay Area high-tech business & management consulting firm. The number of client companies for Henke Associates now numbers more than forty. During his corporate career, Henke operated sequentially on "both sides" of MCAE/MCAD and EDA, as a user and as a vendor. He's a veteran corporate executive from Cincinnati Milacron, SDRC, Schlumberger Applicon, Gould Electronics, ATP, and Mentor Graphics. Henke is a Fellow of the Society of Manufacturing Engineers (SME) and served on the SME International Board of Directors. Henke was also a board member of SDRC, PDA, ATP, and the MacNeal Schwendler Corporation, and he currently serves on the board of Stottler Henke Associates, Inc. Henke is also a member of the IEEE and a Life Fellow of ASME International. In April 2006, Dr. Henke received the 2006 Lifetime Achievement Award from the CAD Society, presented by CAD Society president Jeff Rowe at COFES2006 in Scottsdale, AZ. In February 2007, Henke became affiliated with Cyon Research's select group of experts on business and technology issues as a Senior Analyst. This Cyon Research connection aids and supplements Henke's ongoing, independent consulting practice (HENKE ASSOCIATES).
Dr. Henke is also a contributing editor of the EDACafé.com EDA WEEKLY, and he has published ten (10) monthly EDA WEEKLY articles since November 2009; URL's available.
"2010 Business Planning Tool Kit Promotion"
from HENKE ASSOCIATES,
please click on the URL below and scroll to the last entry on that page:
Since May 2003 HENKE ASSOCIATES has now published a total of ninety (90) independent COMMENTARY articles on MCAD, PLM, EDA and Electronics IP on IBSystems' MCADCafé and EDACafé. The 91st Commentary will cover the G5 IP vendors for Q2 2010, and it is intended to be posted on August 16, 2010 simultaneously with the above EDA WEEKLY.. Further information on HENKE ASSOCIATES, and URL's for past Commentaries, are available at http://www.henkeassociates.net . March 31, 2010 marked the 14th Anniversary of the founding of HENKE ASSOCIATES.
You can find the full EDACafe.com event calendar here.
To read more news, click here.
-- Russ Henke, EDACafe.com Contributing Editor.