Silicon Creations - 4-lane V-by-One Serializer TSMC 40nm LP

Synopsys - NVM OTP in UMC (180nm, 110nm, 90nm, 80nm, 55nm, 40nm)

McLean Labs - SampleFlex CIC Interpolator

CAST, Inc. - TSN Ethernet Subsystem

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Three Things you need to know to use the Accellera PSS, Cadence Three primary considerations for adopting Accellera Portable Stimulus Standard (PSS) are understanding the following: the value and relevance of this minset; and …

The Secret to Building IP at the Cutting Edge, True Circuits, Inc. At 7nm and beyond, the cost and time to develop IP is very high. To gain a suitable return, it's critical to have an efficient design methodology that produces a …

Overcoming Timing Closure Issues in Wide Interface DDR, HBM and ONFIs Subsystems, True Circuits, Inc. In wide chip interfaces like DDR, HBM and ONFI, it can be challenging to synthesize and connect high-frequency controllers to the PHY hard macros. Clock trees can be …