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1 Gbit/s LDPC Decoder and Encoder(WiMedia UWB)
Features

100 Gbit/s IEEE 802.3bj RS Encoder and Decoder
100 Gbit/s IEEE 802.3bj RS Encoder and Decoder
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100G OTN
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2D FEC
Features

3GPP (Long Term Evolution) LTE Turbo Code decoder
tb_ctc_lte_dec
Features

3GPP-LTE (TC7000-LTE)
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4G LTE / LTE-A Turbo Decoder
4G LTE / LTE-A Turbo Decoder
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5G NR LDPC Decoder
5G_NR_LDPC_Decoder
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Advanced FEC Cores for Wireless and Wired Applications ECC66100 Series
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BCH bit symbol error correction
BCH Error Correction Code FEC
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Block Turbo Code decoder (BTC)
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Block Turbo Code encoder (BTC)
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BPSK Software Demodulator
AHD100-SDR
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Burst Error Correction using CRC methods
FireCode FEC
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CCSDS 131.2 Wideband Demodulator
CCSDS_131_2_Wideband_Demodulator
Features

CCSDS 131.2 Wideband Modulator
CCSDS 131.2 Wideband Modulator
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CCSDS 231.0 LDPC Encoder and Decoder
CCSDS 231.0 LDPC Encoder and Decoder
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CCSDS AR4JA LDPC Encoder and Decoder
CCSDS_AR4JA_LDPC_Encoder_Decoder
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CCSDS LDPC Decoder and Encoder IP Core
Features

CCSDS SCCC Turbo Encoder Decoder
CCSDS_SCCC_Turbo_Encoder_Decoder
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China Multimedia Mobile Broadcasting (CMMB) LDPC decoder
tb_cmmb_dec
Features

China Multimedia Mobile Broadcasting (CMMB) LDPC decoder
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ComLab
Features

Configurable data width Error Correcting Code 1 bit Correction 2 bit detection
Hamming Code ECC
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Conv Enc
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CoreCORDIC
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Creonic 5G LDPC Encoder
5G LDPC Encoder
Features

Creonic DVB-GSE Encapsulator and Decapsulator
DVB-GSE Encapsulator and Decapsulator
Features

CREONIC DVB-S2X Multi-Carrier Demodulator
DVB-S2X Multi-Carrier Demodulator
Features

Creonic FFT IP core
Fast Fourier Transform IP core
Features

Creonic ITU 25G PON LDPC Encoder and Decoder
ITU 25G PON LDPC Encoder and Decoder
Features

Creonic UltraFast BCH Decoder
UltraFast BCH Decoder
Features

Display Port 1.4 Tx PHY & Controller IP (Silicon Proven in TSMC 28HPC+)
Display Port v1.4 Tx PHY & Controller IP
Features

DisplayPort 1.4a Receiver Link Controller IP
eDP Receiver Controller IP
Features

DisplayPort 1.4a Transmitter Link Controller IP
eDP Transmitter Controller IP
Features

DO-254 Soft Error Mitigation Controller 1.00a
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DOCSIS 3.1. LDPC Decoder IP Core
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Dual BCH

DVB-C2 Receiver IP (including LDPC and BCH Decoder)
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DVB-RCS Turbo Decoder
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DVB-RCS2 Modulator
Modulator_DVB-RCS2
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DVB-RCS2 Multi-Carrier Receiver
Features

DVB-RCS2 Turbo Decoder
Features

DVB-S2 Demodulator
Features

DVB-S2 LDPC and BCH Encoder and Decoder
Features

DVB-S2 LDPC decoder
tb_dvbs2_dec
Features

DVB-S2 LDPC decoder
Features

DVB-S2X LDPC/BCH Decoder
DVB-S2X-Decoder
Features

DVB-S2X Wideband Demodulator
Features

DVB-S2X Wideband LDPC/BCH Decoder
Wideband_Decoder_DVB-S2X
Features

DVB-S2X-Modulator
DVB-S2X-Modulator
Features

ECC Core
Features

ECC66100 Series SD-FEC Encoder/Decoder Cores
Features

EFEC20

EFEC7

FHG_RS_DEC
Features

FHG_RS_ENC
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G.709 RS(255,239) GFEC

G.975 I.4 BCH/RS EFEC

G.975 I.7 BCH/BCH EFEC

G.975 I.9 BCH/BCH EFEC

Generic Polar FEC Codec
Generic_Polar_FEC_Codec
Features

GEO-Mobile Radio (GMR) LDPC Decoder
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GMR Release 2 and GMR Release 3 LDPC Decoder
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GPON FEC 2.5 Gbps
Features

High Performance Silicon IP Solutions
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HIP 2500
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HIP 4000 Golay Encoder/Decoder IP Core
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Hybrid Viterbi eSi-7591
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IEEE 802.11ad (WiGig 60GHz) LDPC Decoder
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IEEE 802.11n/802.11ac (WiFi) LDPC Decoder
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IEEE 802.15.3c (60 GHz PHY) Multi-Gbit/s LDPC Decoder
Features

Inventra CON-DEC, Concatenated Decoder; ~5,700 gates documented (user parameterised design), size and max clock depends on technology and symbol rate and channe

Inventra CON-ENC, Concatenated Encoder; 15,000 - 48,000 gates (user parameterised design), size and max clock depends on technology, symbol rate and channel par

Inventra INT-DEINT, Interleaver/Deinterleaver; ~2,500 gates (user parameterised design), size and max clock depends on technology and parameters.

Inventra PRSDEC, Programmable Reed-Solomon Decoder; 9,000 - 20,000 gate typical (user parameterised design), size and max clock depends on technology and parame

Inventra PRSENC, Programmable Reed-Solomon Encoder; 2,500 - 6,000 gate typical (user parameterised design), size and max clock depends on technology and paramet

Inventra RSDEC, Reed-Solomon Decoder; 9,000 - 20,000 gate typical (user parameterised design), size and max clock depends on technology and parameters.

Inventra RSENC, Reed-Solomon Encoder; 2,500 - 6,000 gate typical (user parameterised design), size and max clock depends on technology and parameters.