Login
 IP's Search 
 
 
PortabilityShow All
Only
Only
Only
Only
Only
Only
TypeShow All
Only
Only
Only
Only
Only
CategoriesShow All
CompaniesShow All
 Search Result 
« Prev | First…10 11 12 13 14 15 16 17 18 19 20 …35…Last | Next »
Displaying 1401-1500/3853

logiRC
Features
logiRC
Features
logiREF-ZGPU-TED 2D/3D GPU Zynq Ref Design (TED inrevium)
logiREF-ZGPU-TED
Features
logiREF-ZGPU-ZC706 2D/3D GPU Zynq Ref Design (ZC706)
logiREF-ZGPU-ZC706
Features
logiREF-ZGPU-ZED 2D/3D GPU Zynq Ref Design (ZedBoard)
logiREF-ZGPU
Features
logiSDHC SD Card Host Controller
logiSDHC
Features
logiSPI SPI to AXI4 Controller Bridge
logiSPI
Features
logiSTEP Stepper Motor Controller
logiSTEP
Features
logiTAP
Features
logiUART
Features
logiVIEW Perspective Transformation and Lens Correction Image Processor
logiVIEW
Features
logiWIN
Features
logiWIN
Features
Lossless & Near-Lossless JPEG-LS Decoder
JPEG-LS-D
Features
Lossless & Near-Lossless JPEG-LS Encoder
JPEG-LS-E
Features
Low Profile Board XpressGX4-LP Based On Altera FPGA
Features
Low Profile Board XpressGX5-LP HE based on Altera FPGA
Features
Low-Latency AVC/H.264 Baseline Profile Decoder Core
H264-D-BP
Features
Low-pass filter
180SMIC_LPF_01
Features
Low-Power AVC/H.264 Baseline Profile Decoder Core
H264-LD-BP
Features
Low-Power AVC/H.264 Baseline Profile Encoder Core
H264-E-BPS
Features
Low-Power Deeply Embedded RISC-V Processor
BA51
Features
Low-power, performance-efficient, compact security processors help protect against logical, hardware and physical attacks
dwc_secure_arc_sem
Features
LPDDR2 SDRAM Controller
Features
LPDDR3 DRAM Memory Controller
ARASTU_LPDDR3_MEM_CONTR
Features
LPDDR3/4 DRAM Memory Controller
ARASTU_LPDDR3/4_MEM_CONTR
Features
LPDDR4 DRAM Memory Controller
ARASTU_LPDDR4_MEM_CONTR
Features
LPDDR4 SDRAM Controller Core
Features
LVDS
CL11001
LVDS (FPD-link)
CL12451
M-JPEG Dec
Features
M-JPEG Enc
Features
M-PHY
Features
M1284H-A1 IEEE 1284 Host Parallel Port; 79 unidirectional I/O ports, 60.5% utilization of an A54SX16A FPGA, 333 S modules, 545 C modules, 57 MHz Post layout per
M16450
Features
M16550
Features
M16550A-B1 Enhanced UART w/FIFO; 346/1536 macrocells, 3/12 channel memory blocks and 43/294 unidirectional I/O ports of CY39100V676-200MBC CPLD device utilized,
M16C450D1 UART; 434 Logic Cells and 41 I/Os of 20K400EFC672 PLD device utilized, 111 MHz post layout performance
M16X50-A1 Enhanced UART; 43 unidirectional I/O ports, 16-byte Rx and Tx FIFOs, 56.8% utilization of an A54SX32A FPGA, 639 S modules, 997 C modules, 25 MHz post
M16X50-B1 Enhanced UART; Choice of 16, 32, 64 of 128 byte FIFO, 403, 411, 419 or 427/1536 macrocells used depending upon FIFO size, 3/12 channel memory blocks a
M8051WARP-A1 8-bit Microcontroller; 227 unidirectional I/O ports, 73.7% utilization of an A54SX32A FPGA, 459 S modules, 1666 C modules, 40 MHz post layout perfo
M82365SL-A1 PCMCIA PC Host Interface; 161 unidirectional I/O ports, 65.9% utilization of A54SX72A FPGA, 883 S modules, 3095 C modules, Post layout performance i
M82371IDED1 IDE Controller ATA-4; 7173 Logic Cells and 245 I/Os of 20K400EFC672 PLD device utilized, 38.5 MHz post layout performance
M8237A-B1 4-Channel DMA Controller; 618/1536 macrocells and 68/294 unidirectional I/O ports of CY39100V676-200MBC CPLD device utilized, 43 MHz post layout perfo
M8259A-A1 8 Channel Programmable Interrupt Controller; 41 unidirectional I/O ports, 37.4% utilization of A42MX16BQ100 FPGA, 105 S modules, 465 C modules, 6 MHz
Many-core processor subsystem IP-on-FPGA
Features
Master I3C bus controller with FIFO
DI3CM-FIFO
Features
Master/Slave Octal SPI Controller
SPI-MS
Features
Mathematically Lossless JPEG 2000 Encoders & Decoders
Features
MB-OFDM UWB PHY: Baseband Processor (BBP)
Features
MC-ACT-6809
Features
MC-ACT-CAN
Features
MC-ACT-DVBMOD
Features
MC-ACT-G704E1
Features
MC-ACT-HDLC
Features
MC-ACT-PL3LINK
Features
MC-ACT-PL3PHY
Features
MC-ACT-RSENC
Features
MC-ACT-SDRAMDDR
Features
MC-ACT-SPI_F
Features
MC-ACT-TWSI
Features
MC-ACT-UART
Features
MC-ACT-UARTF
Features
MC-ACT-UARTM
Features
MC-ACT-UL2LINK
Features
MC-ACT-UL2PHY
Features
MC-ACT-UL3LINK
Features
MC-ACT-UL3PHY
Features
MC-ACT-VME2416
Features
MC-ACT-VME32
Features
MC-ACT-XCANF
Features
MC-ACT-XCANMF
Features
MDDI v.1.1
CL12643
Mem Test Analyzer Core
Features
MemConnect™
Features
Memory Controller
Features
Memory Request Optimizer
MRO
Features
Memory Test Core
Features
Mentor Graphics AXI Verification IP Suite - Altera Edition
Features
MI2C-A1 I2C Bus Interface; 29 unidirectional I/O ports, 73.7% utilization of A54SX08A FPGA, 146 S modules, 420 C modules, 41 MHz Post layout performance
MI2C-B1 I2C Bus Interface; 153/1536 macrocells and 29/294 unidirectional I/O ports of a CY39100V676-200MBC CPLD device utilized, 53 MHz post layout performance
MI2CD1 I2C Bus Interface; 526 Logic Cells and 28 I/Os of 20K400EFC672 PLD device utilized, 54.7 MHz post layout performance
MI2CM
Features
MI2CMS
Features
MI2CS
Features
microAptiv MPU
Features
MIDDLEWARE
Features
MII to RMII
Features
Mil-Std-1553 BC, RT, MT IP Core for FPGAs and ASIC with interface to local-bus
BRM1553D
Features
Mil-Std-1553 Extended Reliability IP Core for FPGAs
BRM1553ERL
Features
Mil-Std-1553 IP core
BRM1553D
Features
Mil-Std-1553 Remote Terminal, Bus Controller and monitor
BRM1553FE
Features
miniLVDS
CL11021
MIO
Features
MIPI - CSI-2 Reciever
gda_mipi_csi_rx
Features
MIPI - CSI-2 Transmitter
gda_mipi_csi_tx
Features
MIPI - CSI-3 Device Controller
gda_mipi_csi3_dev
Features
MIPI - DSI Receiver
gda_mipi_dsi_rx
Features
MIPI - DSI Transmitter
gda_mipi_dsi_tx
Features
MIPI CPHY
gda_mipi_cphy
Features
« Prev | First…10 11 12 13 14 15 16 17 18 19 20 …35…Last | Next »
Displaying 1401-1500/3853



© 2024 Internet Business Systems, Inc.
670 Aberdeen Way, Milpitas, CA 95035
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise