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 Search Result 
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Displaying 201-217/217

USB 3.0 PHY in TSMC (65nm, 55nm, 40nm, 28nm)
dwc_usb3phy_otg_tsmc
Features
USB 3.0 PHY in UMC (65nm, 40nm)
dwc_usb3phy_otg_umc
Features
USB 3.1 Controller IP
dwc_usb31_controller
Features
USB 3.1 PHY (10G/5G) in Samsung (14nm, 10nm, 11nm, 8nm)
dwc_usb31sspphy_samsung
Features
USB 3.1 PHY (10G/5G) in TSMC (16nm, 12nm, 7nm)
dwc_usb31sspphy_tsmc
Features
USB 3.1/DisplayPort 1.3 Controller IP Solutions
dwc_usb31_dp_13_controller
Features
USB 3.1/DisplayPort 1.4 IP Subsystem Solution
dwc_usc31_dp_14_subsystem_solution
Features
USB 3.2 Controller IP
dwc_usb32_controller
Features
USB HSIC PHY in GlobalFoundries (28nm)
dwc_usb_hsic_phy_globalfoundries
Features
USB HSIC PHY in SMIC (40nm, 28nm)
dwc_usb_hsic_phy_smic
Features
USB HSIC PHY in TSMC (65nm, 40nm, 28nm, 16nm)
dwc_usb_hsic_phy_tsmc
Features
USB-C 3.1 SS/SSP PHY, Type-C in TSMC (16nm, 12nm, 7nm)
dwc_usbc31sspphy_tsmc
Features
USB-C 3.1/DP TX PHY in Samsung (14nm, 11nm)
dwc_usbc31dptxphy_samsung
Features
USB-C 3.1/DP TX PHY in TSMC (16nm, 12nm, 7nm)
dwc_usbc31dptxphy_tsmc
Features
USB-C 3.2 SS/SSP PHY, Type-C in TSMC (7nm)
dwc_usbc32sspphy_tsmc
Features
VESA DSC Decoder
dwc_vesa_decoder
Features
VESA DSC Encoder
dwc_vesa_encoder
Features
« Prev | 1 2 3 | Next »
Displaying 201-217/217
DownStream: Solutions for Post Processing PCB Designs
Verific: SystemVerilog & VHDL Parsers



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