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Displaying 1-100/176

2D FFT
A2P Application Adaptive Processor
Features
Accumulator
Features
Alizem Motor Control IP
ARC AS200 Audio Family —Efficient Single/Dual Core Audio Processors, Optimized Codecs
dwc_arc_audio_codecs
Features
ARC EV Processors are fully programmable and configurable IP cores that are optimized for embedded vision applications
dwc_arc_ev_processors
Features
ATSC 8-VSB modulator (CMS0033)
Features
BPSK Software Demodulator
AHD100-SDR
Features
Cascaded Integrator Comb (CIC) Compiler
Features
Cascaded Integrator-Comb (CIC) Filter
Features
CLP-17 Elliptic Curve Point Multiplier Core
Features
CMS0004
Features
CMS0021
Features
CMS0025
Features
Color Space Converter
Features
Compact, ultra-low power ARC EM processors and ASIL-Ready ARC EM Safety Island IP feature excellent code density
dwc_arc_em_family
Features
Comparator
Features
Complete suite of development tools, ARC development systems and operating systems for embedded software application development
dwc_arc_tools_ecosystem
Features
Complex Multiplier
Features
Consumer Advanced Technology Attachment (CE-ATA) Device Storage Interface Core
Features
CORDIC
Features
CORE-1553 (CMS-1553)
Features
CORE-1553 (CRT-1553)
Features
CoreAES128
Features
CoreCORDIC
Features
CoreDDS
Features
CoreDES
Features
CoreFFT
Features
CoreFIR
Features
Correlator IP Core
Features
CUSB: USB 1.1 Device Controller Core
Features
DAC Correction Filter
AH1002
Features
DB1800
Features
DFP2INT: Floating Point To Integer Pipelined Converter
Features
DFPADD: Floating Point Pipelined Adder Unit
Features
DFPAU: Floating Point Arithmetic Unit
Features
DFPCOMP: Floating Point Comparator Unit
Features
DFPDIV: Floating Point Pipelined Divider Unit
Features
DFPMU: Floating Point Mathematics Unit
Features
DFPMUL: Floating Point Pipelined Multiplier Unit
Features
DFPSQRT: Floating Point Pipelined Square Root Unit
Features
DHBF
Features
DINT2FP: Integer to Floating Point Pipelined Convert
Features
Distributed Arithmetic FIR (DA-FIR) Filter Generator
Features
DRPIC166X
Features
DS2/E2 Deframer Core
Features
DS2/E2 Deframer Core
Features
DS2/E2 Framer Core
Features
DS3/E3 Deframer Core
Features
DS3/E3 Framer Core
Features
DSMART, IP Core for smart card reader apps
DSMART
Features
DSP-enhanced ARC EMxD and HS4xD processors provide combined RISC + DSP processing for computation intensive applications
dwc_dsp_solutions
Features
DSP2
Features
DSPI-APB
Features
Dual Parallel FFT
Features
Dynamic Block Reed-Solomon Decoder
Features
Dynamic Block Reed-Solomon Encoder
Features
E1/T1/J1 Deframer Core
Features
E1/T1/J1 Framer Core
Features
ES0100-5 Viterbi Decoder
Features
ESD0064 – 64 POINT FFT
Features
ESD1024c – Configurable 1024/512 point FFT
Features
eSi-7560
Features
EXODUS I™
Features
Fast AES
Features
Fast Fourier Transform (FFT)
Features
Fast SHA-1/SHA-256
Features
FFT Compiler
Features
FFT/IFFT
FHG_RS_DEC
Features
FIR Compiler
Features
FIR Compiler
FIR Compiler II
FIR Filter Generator
Features
FR8052
Features
FR8052_HA0A_IWT
Features
FR8052_HA0L_IWT
Features
Gamma Corrector
Features
GENESIS III™
Features
GRFPU High-PerformanceFloating Point Unit
Features
High-performance ARC HS3x and HS4x processors are optimized for GHz+ operating speeds with minimum area and power consumption
dwc_arc_hs_family
Features
Hybrid Viterbi eSi-7591
Features
iniDSP, a 16-bit fixed-point general purpose DSP
Features
Interleaver / De-interleaver
Features
Interleaver/De-Interleaver
Features
Inventra DSP-DDS, Direct Digital Synthesizer Core; 1,500 gates, 50MHz
Inventra FFT, Fast Fourier Transform, Inverse FFT/Fast Convolver; 20,000 gates typical (user parameterised design), size and max clock depends on technology and
Inventra FIR, Linear Phase FIR Filter; 5,000-65,000 gates typical (user parameterised design), size and max clock depends on technology and filter order.
Inventra NCO, Numerically Controlled Oscillator; 1,000-3,000 gates typical (user parameterised design), size and max clock depends on technology and angular res
Inventra RRS, Recursive Running Sum/Comb Filter; ~3,000 gates typical (user parameterised design), size and max clock depends on technology and filter order.
JPEG-C
Features
JPEG-D
Features
JPEG-E
Features
JPEG2K_E
Features
Least Mean Square (LMS) Adaptive Filter
Features
LMS Adaptive Channel Equalizer
AH1001
Features
logiAIR
Features
logiBITBLT
Features
logiI2S
Features
Low-power, performance-efficient, compact security processors help protect against logical, hardware and physical attacks
dwc_secure_arc_sem
Features
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Displaying 1-100/176



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