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Part Number : TCI-UL28HPM-DDRHDLL
Short Desc. : UMC L28HPM 28nm DDR DLL - 200MHz-1000MHz
Features : - Designed for high-speed DDR style interface applications.
- Generates precise delays that can be programmed from 0 to 360 degrees of the reference period.
- delays multiple periodic or aperiodic signals independent of voltage and temperature.
- Delivers optimal jitter performance over a wide frequency range.
- Available in flexible form factors for easier integration.
Categories :
Tags : DDR DLL, UMC 28nm HPM, UMC L28HPM, UMC, L28HPM , Multi-slave DLL, Slave Delays, Analog Delay Line, DDR
Maturity : Silicon proven
Portability :
Type :
 Hard IP 
Foundry :
UMC
Nodes :
28nm
Process :
L28HPM

Deliverables : - GDSII (100% DRC and LVS clean)
- LVS Spice netlist
- Verilog model
- Synopsys synthesis model
- LEF for clock generator PLL
Verific: SystemVerilog & VHDL Parsers



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