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 Digital Core Design 
Part Number : CryptOne
Short Desc. : The DCRP1A - CryptOne IP is a 100% safe cryptographic system
Overview :

The CryptOne, a 100% safe cryptographic system, has been based on more than 20 years DCD’s market experience. Starting from 1999, Digital Core Design mastered more than 70 different architectures (like e.g.  World’s Fastest 8051, I3C, deeply embedded 32-bit CPU), which have been utilized in more than 500 000 000 electronic devices around the globe.
The DCD’s CryptOne core is a universal and fully scalable solution which is able to boost asymmetric cryptographic algorithms like:

  • RSA (keys up 4096 bits) with CRT option
  • Diffie-Hellman
  • Elliptic Curve Cryptography (ECC) in GF(p)
  • Miller-Rabin test.

The energy efficient architecture of CryptOne IP core enables the usage of the very small silicon footprint with high processing speeds. It can be provided with various of different interfaces including AMBA AHB, AXI4, APB. Very intuitive interface enables the fast, straightforward system integration. The core is resistant to the power and  timing attacks.The DCD’s CryptOne system is universal fully scalable solution accelerating up to 4096 bits big number arithmetic operations such as: modular multiplication, subtraction, addition and shifts. Cryptographic instructions support provides ability to boost public key algorithms like RSA, Diffie-Hellman and ECC. The energy efficient architecture of CryptOne system enables using the very small silicon footprintwith high processing speeds. It can be provided with various of different interfaces including AMBA AHB, AXI4, APB. Very intuitive interface enables fast, straightforward system integration.


Features : - CryptOne programmed algorithms:
- Constant time modular exponentiation
- Constant time, parallel modular exponentiation CRT
- Constant time ECDSA sign/verify
- Constant time ECDH
- Constant time elliptic curve point multiplication
- No branch modular multiplicative inverse
- No branch GCD
- Constant time modular reduction
- Constant time multiplication
- Constant time division
- Cryptographic algorithm applications:
- ECDSA, ECDH
- RSA key generation
- RSA Sign/Verify/Encrypt/Decrypt
- Diffie-Hellman schemes
- Miller-Rabin Primality check
- System applications:
- Client-server communication
- Sensor networks
- SSL/TLS stacks
- IoT devices
- Embedded security/ID devices
- AMBA AHB, AXI4, APB interface ready
- Rapid & easy development with delivered API
- Patent pending architecture
- Algorithms resistant against SPA and timing attacks
- CryptOne elliptic curves with native support:
- NIST P-192
- NIST P-224
- NIST P-256
- NIST P-384
- Koblitz P-192
- Koblitz P-256
- Koblitz P-384
- Brainpool P-256
- Brainpool P-384
- Brainpool P-512
- Other/custom curves optional support
- Software support:
- OpenSSL engine
- MbedTLS port
- OS independent crypto library
Categories :
Portability :
 FPGA Technologis 
Altera :
APEX 20KC
APEX 20KE
APEX II
Arria 10
Arria GX
Arria II GX
ARRIA II GZ
ARRIA V GT
ARRIA V GX
ARRIA V GZ
ARRIA V ST
ARRIA V SX
Cyclone
Cyclone II
Cyclone III
CYCLONE III LS
CYCLONE IV GX
CYCLONE V E
CYCLONE V GT
CYCLONE V GX
CYCLONE V SE
CYCLONE V ST
CYCLONE V SX
EP5C
FLEX 10K
HardCopy
HardCopy II
HARDCOPY III
HARDCOPY IV E
HARDCOPY IV GX
HardCopy Stratix
MAX II
MAX V
Stratix
Stratix GX
Stratix II
Stratix II GX
Stratix III
STRATIX III E
Stratix IV
STRATIX IV E
STRATIX IV GT
STRATIX IV GX
Stratix V
STRATIX V E
STRATIX V GS
STRATIX V GT
STRATIX V GX
Lattice :
ispClock
ispMACH 4000
LatticeEC/ECP
LatticeECP2
LatticeECP2M
LatticeECP3
LatticeSC
LatticeSCM
LatticeXP
LatticeXP2
MachXO
MachXO2
Platform Manager
Power Manager II
Xilinx :
Artix-7
Kintex-7
Kintex-7 -2L
Spartan-3
Spartan-3 XA
Spartan-3A
Spartan-3A DSP
Spartan-3A DSP XA
Spartan-3A XA
Spartan-3AN
Spartan-3E
Spartan-3E XA
Spartan-6
Spartan-6 -1L
Spartan-6 HXT
Spartan-6 LX
Spartan-6 LXT
Spartan-6 XA
Spartan-6 XC
Virtex-4
Virtex-4 FX
Virtex-4 LX
Virtex-4 SX
Virtex-4 XA
Virtex-5
Virtex-5 FX
Virtex-5 FXT
Virtex-5 LX
Virtex-5 LXT
Virtex-5 SX
Virtex-5 SXT
Virtex-5 TXT
Virtex-6
Virtex-6 -1L
Virtex-6 CXT
Virtex-6 HXT
Virtex-6 LX
Virtex-6 LXT
Virtex-6 SXT
Virtex-7
Virtex-7 -2L
Virtex-7 XT
Virtex-7 XT
Virtex-7T
Virtex-II Pro
Zynq-7000

Type : Soft
Deliverables : - Source code: VHDL Source Code or/and VERILOG Source Code or/and FPGA Netlist
- VHDL & VERILOG test bench environment: Active HDL automatic simulation macros, ModelSim automatic simulation macros, NCSim automatic simulation macros, Tests with reference responses
- Technical documentation: Installation notes, HDL core specification, Datasheet
- Synthesis scripts
- Example application
- Technical support: IP Core implementation support, 3 months maintenance, Delivery the IP Core updates, minor and major versions changes, Delivery the documentation updates, Phone & email support



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