The DFPSQRT uses the pipelined mathematics algorithm to compute square root function. The input number format is accord-ing to IEEE-754 standard. DFPSQRT sup-ports single precision real numbers. SQRT operation can be pipelined up to 9 levels. Input data are fed every clock cycle. The first result appears after 9 clock periods latency and next results are available each clock cycle. Precision and accuracy are parameter-ized.