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 Xilinx 
Part Number : XAUI
Overview :
The Xilinx 10 Gigabit Attachment Unit Interface (XAUI) LogiCORE™ provides a 4-lane high speed serial interface, providing up to 10 Gigabits per second (Gbps) total throughput. Operating at an internal clock speed of 156.25 MHz, the core includes the XGMII Extender Sublayers (DTE and PHY XGXS), and the 10GBASE-X sublayer, as described in clauses 47 and 48 of IEEE 802.3ae-2002. In addition, the core supports an optional serial MDIO management interface for accessing the IEEE 802.3ae-2002 clause 45 management registers. The MDIO interface may be omitted to save logic, in which case a simplified management interface is provided via bit vectors.
Features : - Single chip solution for XAUI applications
- Designed to IEEE 802.3ae-2002 specification
- Allows direct interfacing between Virtex-II Pro, Virtex-4 FX, or Virtex-5 LXT FPGAs and industry standard ASSP PHY devices
- Supports 32 bit DDR or 64 bit SDR backend interface
- Uses Digital Clock Management to implement optional XGMII interface clocking
- Leverages DDR I/O primitives for the optional XGMII interface
- Uses RocketIO Transceivers (3.125G x 4) for the XAUI interface
- Optional 802.3ae-2002 clause 48 State Machines
- Customize using the CORE Generator™ solution
- Implements DTE XGXS, PHY XGXS and 10G BASE-X PCS in a single netlist
- Supports 10-Gigabit Fibre Channel (10-GFC) XAUI data rates and traffic
Categories :
Portability :
Type : Soft



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