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Short Desc. :
STM0/1/4 SDH Deframer Core
Aliathon's STM0/1/4 cores provide a complete SDH/SONET solution, up to 622mbps (STM4/OC12). Not only do they provide full chanelisation at the AU level (up to 12 AU3s processed concurrently) but full channelisation at the TU level as well (up to 336 TU11s processed concurrently). All defined TUG3, TUG2 and TU structures are supported, as well as all synchronous and asynchronous PDH mappings.
- Detects and aligns to the SDH framing pattern.
- Performs frame synchronisation for STM0, STM1 and STM4, and generates LOS, OOF and LOF alarms. The core may be dynamically switched between SDH rates.
- Descrambles the SDH frame, extracts Regenerator Section Overhead, and detects B1 errors.
- Extracts Multiplex Section Overhead and detects B2 errors.
- Processes all AU pointers.
- Extracts VC3, VC4 and VC4-4c, both channelised and single-channel. All legal combinations of VCs are supported. The VC settings may be dynamically reconfigured, and made on a per VC basis.
- Detects B3 errors for all VCs and extracts Higher Order Path Overhead.
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