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Short Desc. :
DS3/E3 Framer Core
The Aliathon DS3/E3 Framer core provides a flexible, resource-efficient, programmable-logic based solution\for level 3 PDH interfacing. It caters for both clear-channel payloads, such as PLCP/ATM over DS3, and channelised applications, such as multiple E2s over E3.
- Generates multiple output streams, making it ideal for interfacing to SONET/SDH mappers or multichannel LIUs. The output streams may dynamically range between 1 and 8 bits wide, allowing seamless interfacing to SONET/SDH VC3 mappings
- Performs frame generation for the following level 3 PDH signals...
- o DS3 (m23 and cbit)
- o E3 with positive justification (g.751)
- o E3 clear-channel (g.832)
- Generates AIS and IDLE patterns
- Calculates and inserts parity bits for DS3.
- Provides an overhead insertion interface.
- Inserts both channelised and clear-channel payloads. For clear-channel applications the core provides a byte-aligned data input. For channelised applications the core can insert
- o 7 tributaries (6.312kbps over DS3)
- o 4 tributaries (8.448kbps over E3)
- Accepts configuration on a per-channel basis, allowing mixes of protocols and payloads to be concurrently processed. Configuration may also be dynamically modified.
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