The DUSB2 is hardware implementation of full/high-speed peripheral controller that inter-faces to UTMI bus transceiver. The DUSB2 contains the USB PID and address recognition logic, state machines to handle USB packets and transactions, endpoints number recognition logic and endpoints FIFO control logic. The DUSB2 is designed to support 12 Mb/s “Full Speed” (FS) and 480 Mb/s “High Speed” (HS) serial data transmission rates. Design is technology independent and thus can be implemented in variety of process technologies. This core strictly conforms to USB Specification v2.0. The DUSB2 core is delivered with fully automated testbench and complete set of tests allowing easy package validation at each stage of SoC design flow.