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Part Number : TCI-TN65LP-CGLPLL
Short Desc. : TSMC CLN65LP 65nm Clock Generator PLL - 60MHz-300MHz
Features : - Designed as a very flexible clock multiplier capable of multiplying an input clock from 1 to 4096 with very small period jitter while operating at the highest possible bandwidth.
- Delivers optimal jitter performance over all multiplication settings.
- Available with multi-phase outputs and, in some processes, with an I/O voltage regulator.
- Ideal for system clock generation, SerDes and video clock applications.
Categories :
Tags : Clock Generator PLL, TSMC 65nm LP, TSMC CLN65LP, TSMC, CLN65LP , Low Jitter, Core Clocking
Maturity : Silicon proven
Portability :
Type :
 Hard IP 
Foundry :
TSMC
Nodes :
65nm
Process :
CLN65LP

Deliverables : - GDSII (100% DRC and LVS clean)
- LVS Spice netlist
- Verilog model
- Synopsys synthesis model
- LEF for clock generator PLL



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