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Part Number : TCI-TN28HPL-DSLPLL
Short Desc. : TSMC CLN28HPL 28nm Deskew PLL - 110MHz-550MHz
Features : - Designed to eliminate clock distribution latency in systems and individual chips.
- Precisely aligns the clock distribution output with a reference clock.
- Provides a zero-delay feedback divider and zero-skew divided clock outputs.
Categories :
Tags : Deskew PLL, TSMC 28nm HPL, TSMC CLN28HPL, TSMC, CLN28HPL , Low Jitter
Maturity : Silicon proven
Portability :
Type :
 Hard IP 
Foundry :
TSMC
Nodes :
28nm
Process :
CLN28HPL

Deliverables : - GDSII (100% DRC and LVS clean)
- LVS Spice netlist
- Verilog model
- Synopsys synthesis model
- LEF for clock generator PLL
DownStream: Solutions for Post Processing PCB Designs
Verific: SystemVerilog & VHDL Parsers



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