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Part Number : TCI-TN28LP-DSMPLL
Short Desc. : TSMC CLN28LP 28nm Deskew PLL - 160MHz-800MHz
Features : - Designed to eliminate clock distribution latency in systems and individual chips.
- Precisely aligns the clock distribution output with a reference clock.
- Provides a zero-delay feedback divider and zero-skew divided clock outputs.
Categories :
Tags : Deskew PLL, TSMC 28nm LP, TSMC CLN28LP, TSMC, CLN28LP , Low Jitter
Maturity : Silicon proven
Portability :
Type :
 Hard IP 
Foundry :
TSMC
Nodes :
28nm
Process :
CLN28LP

Deliverables : - GDSII (100% DRC and LVS clean)
- LVS Spice netlist
- Verilog model
- Synopsys synthesis model
- LEF for clock generator PLL
TrueCircuits:



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