Introduction
Last Edit July 22, 2001
Selection
The choice between full-custom, semi-custom, fixed or simple gate-level
custom is based on several factors. These include: architectural requirements,
interface technology requirements, size restrictions, speed (maximum worst-case
operating frequency), power limitations, power supply options, manufacturing
cycle time, cost, packaging options, and design time. Figure 1-3
characterizes the problem.
Basis for Discussion
The discussion in this text will refer primarily to Applied Micro Circuits
Corporation arrays for examples of current technology. These include: Bipolar
arrays: the Q5000, and the Q20000 Series; and BiCMOS arrays: the Q14000
and Q24000 Series. However, the design methodology; can be applied to any
arrays from any vendor for any array technology and to any future arrays
developed by AMCC and the other array vendors.
The design methodology is generic. It is
vendor and technology-independent.
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WHERE DO YOU START?
Figure 1-3 The Selection Problem
Note:
Later chapters in this text refer to engineering workstations
(EWS) and the methodology for their use in the design process. Workstations
that are specifically referred to are: the Mentor Graphics System on
Apollo and the Valid on SUN. Simulators referenced include Verilog on
SUN4 and Lasar 6 on the VAX under VMS. The basic tools required for
a design remain the same regardless of the workstation, platform, framework
or mainframe used.
Circuit Architecture
A fixed-instruction set microprocessor or sequencer has
a predefined architecture and instruction set. A bit-slice solution
places some constraints on the designer in terms of architecture but
leaves most of the definition to the user by way of the selected interconnections
between bit-slice modules and the microprogram control. An SSI/MSI implementation
allows the designer the specify in complete, exact detail the architecture
desired.
The SSI/MSI design can be implemented in full custom or
semi-custom VLSI. Bit-slice modules can be emulated on arrays. The ASIC
arrays are big enough to support a complex ALU module but not yet large
enough for one array to replace a full microprocessor.
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