View in your browser
Tuesday, October 10, 2017
What's New on EDACafe
Verific's Parser Platform Selected as Efinix Integrated Design Environment Front End
Silvaco to Showcase Platform Products at ARM TechCon
QuickLogic Partners with AcconSys to Expand eFPGA Design Activity in China
Kester Launches Robotic Cored Wire
Mouser Electronics and Grant Imahara Present Final Video of Shaping Smarter Cities Series
NI AWR Design Environment Adds PDK Support for ON Semiconductor IPD Process
Traditional PC Market Further Stabilizes As Top Companies Consolidate Share, According to IDC
T.J. Rodgers Funds MIT Research Laboratory In Electronics
More EDA News
Embedded, IP & SoC News
Hiroshima University Research Team Accelerates the Development of a Computer-Aided Medical Diagnosis System with Cadence Tensilica Vision P6 DSP Core and Protium S1 FPGA-Based Prototyping Platform
IAR Systems' CTO Shares his View of Future Embedded Development at Arm TechCon
WISeKey Semiconductors Continues its Rapid Growth by Delivering Hardware-based Encryption for GDPR Compliant…
Richardson Electronics Reports First Quarter Fiscal 2018 Results and Declares Quarterly Cash Dividen…
Cadence Achieves TÜV SÜD's First Comprehensive "Fit for Purpose - TCL1" Certification in Support of…
Toshiba Expands U-MOS IX-H MOSFET Family, Adds 40V N-Channel Devices
Magewell Doubles 4K Capture Density with New Dual-Channel Ultra HD Cards
Toshiba Memory Corporation to Further Invest in Production Equipment for Fab 6 at Yokkaichi Operatio…
More IC News
Senior FPGA Engineer for
MaXentric Technologies LLC
at Fort Lee, New Jersey
at Sankt Goar Germany - May 27 - 29, 2019
56th Design Automation Conference
at Las Vegas Convention Center Las Vegas NV - Jun 2 - 6, 2019
Robotics Summit & Expo 2019
at Seaport Hotel & World Trade Center Boston MA - Jun 4 - 6, 2019
Machine Learning & AI Developers Conference
at Santa Clara Convention Center – Mission City Ballroom 5001 Great America Pkwy Santa Clara CA - Jun 5 - 6, 2019
Samir Patel, CEO
Latest Blog Posts
by Roberto Frazzoli
Major stories this week: smartphone shakeup; FPGAs; analog IP; UVM; SLAM; acquisitions; smart buildings
Hardware Emulation Journal
by Jean-Marie Brunet
Post-silicon SW Debug, AI/ML and SSD Design Verification all at Mentor U2U 2019
by IC Insights
After 2Q19 Bottom, Expectations Increase for a 3Q19 IC Market Rebound
Agnisys Automation Review
by Louie De Luna
Not your Average UVM Testbench Generator – Unveiling at DAC 2019
More EDA Blogs
- MIPI CSI-2 MASTER PHY IP
- Power Switch for Integrated PMU (Silicon-proven 40 nm, dual-mode)
- MIPI DSI-2 controllers with VESA DSC for high-speed serial interface between …
Silicon Library Inc.
- SD UHSII PHY supportings SD4.x
Find detailed information about thousands of commercially available IP blocks from more than 230 suppliers.
You are registered as: [email@example.com].
CafeNews is a service for EDA professionals. EDACafe.com respects your online time and Internet privacy.
Edit or Change
my newsletter's profile details.
me from this newsletter.
Copyright © 2019, Internet Business Systems, Inc. — 25 North 14th Steet, Suite 710 San Jose, CA 95112 — +1 (408) 882-6554 — All rights reserved.