SEMATECH Celebrates Twenty-Five Years of Advancing Technology and Manufacturing Innovations and Collaboration

2012 Knowledge Series to Commemorate Twenty-fifth Anniversary

ALBANY, N.Y. — (BUSINESS WIRE) — February 2, 2012 — This year, SEMATECH, the international consortium of leading semiconductor device, equipment, and materials manufacturers, observes its 25th anniversary and celebrates the pre-competitive collaboration that has been the foundation for many of the industry’s technology and manufacturing breakthroughs.

In the twenty-five years since it was founded, SEMATECH has evolved from a bold five-year experiment in U.S. industry/government cooperation to an international collaboration of the broader semiconductor community, including device makers, universities, governments, national laboratories, and the entire industry supply chain.

“SEMATECH has changed dramatically since its inception – in the players in the industry, the technologies we’re addressing, and the partners we’re working with around the world. But what remains consistent is our unrelenting push for innovative solutions and the collaborative efforts to solve common challenges through leveraging resources and sharing risks,” said Dan Armbrust, SEMATECH’s president and CEO.

For over two decades, SEMATECH has helped to bring the world’s leading semiconductor manufacturers together to share resources and solve their most pressing technical and manufacturing challenges.

Some of SEMATECH’s key accomplishments include the following:

  • Laying the groundwork for wafer size transitions
  • Establishing and maintaining the semiconductor industry roadmap
  • Building industry-wide consensus and developing infrastructure for a succession of next-generation lithography technologies, including EUV
  • Guiding the development of robust copper/low-k and 3D interconnect technologies
  • Receiving the prestigious Climate Protection Award from the U.S. Environmental Protection Agency (EPA) for work in reducing perfluorocarbon (PFC) emissions
  • Establishing the Resist and Materials Development Center and the world’s first EUV Mask Blank Development Center, at the College for Nanoscale Science and Engineering (CNSE) of the University at Albany
  • Facilitating breakthroughs in advanced device structures and materials, including high-k metal gate stacks and III-V materials
  • Launching the U.S. Photovoltaic Manufacturing Consortium (PVMC), a partnership between SEMATECH and CNSE, to enable the development of advanced PV-related manufacturing processes throughout the U.S.

Throughout 2012, SEMATECH will be commemorating its 25th anniversary through its lineup of technology-rich forums, the SEMATECH Knowledge Series (SKS), and its Annual SEMICON West Reception to be held July 11 in San Francisco, CA.

The 2012 SKS meetings include the following:

SEMATECH Surface Preparation and Cleaning ConferenceMarch 19-21; Austin, TX

Participants will explore current developments and ITRS challenges in wafer and mask cleaning, including wafer front-end, wafer back-end, and advanced mask as well as environment, safety, and health issues for the 16 nm node and beyond.


GSA/SEMATECH Memory + Conference April 16; Tokyo, Japan

The conference will feature senior executives from leading companies in the memory, logic and system markets to share their perspectives and insights regarding future memory applications, viable business models and collaborative opportunities among logic device and memory technologies.


International Technology Roadmap for Semiconductors (ITRS) Conferences

Summer Meeting, July 11; San Francisco, CA

Winter Meeting, December 5; Hsinchu Taiwan

These public conferences offer technologists and strategists from the manufacturing and supplier communities the opportunity to participate in building the next ITRS by providing input to the working group teams of industry and research experts who revise the semiconductor industry roadmap.



Japan Symposium, June 26; Tokyo, Japan

Taiwan Symposium, October 18; Hsinchu, Taiwan

Korea Symposium, October; Seoul, Korea

Executives and technical experts from SEMATECH and the semiconductor industry community will come together in keynote and in-depth technical sessions to share perspectives on progress and challenges in the areas of advanced devices, EUV lithography, 3D interconnects, and manufacturing productivity.


SEMATECH 3D Interconnect Workshops

Metrology for 3D Interconnect; July; San Francisco, CA

3D Electrostatic Discharge; July; San Francisco, CA

3D Processes; September/October; Location TBA


SEMATECH Advanced Mask Cleaning Workshop September; Monterey, CA

The full-day workshop provides a forum for SEMATECH members, mask and wafer cleaning suppliers, and researchers to discuss advancements in technologies and solutions applicable to advanced mask cleaning and surface preparation challenges.


SEMATECH International Symposium on Advanced Gate Stack Technology September 19-20; Albany, NY

The symposium will feature industry experts presenting their latest research in both invited and contributed talks and a discussion panel of representatives from major semiconductor device makers, equipment makers, and academia.


International Symposium on Extreme Ultraviolet Lithography and Lithography Extensions September 30 – October 4; Brussels, Belgium

The symposium brings the industry together to discuss and assess the worldwide status of EUVL technology and infrastructure readiness.


1 | 2  Next Page »

Review Article Be the first to review this article

 True Circuits: Ultra PLL

Featured Video
More Editorial  
Latest Blog Posts
Modesto (Mo) CasasGlobal Business in EDA
by Modesto (Mo) Casas
The Contingent Purchase Order Reassures Buyer and Seller
Bob Smith, Executive DirectorBridging the Frontier
by Bob Smith, Executive Director
Meet the New Cylynt, Fighting Software Piracy Around the Globe
Anupam BakshiAgnisys Automation Review
by Anupam Bakshi
Smart Assembly of SoC Designs
Digital Design ASIC Manager for EDA Careers at RTP, North Carolina
Senior Application Engineer Formal Verification for EDA Careers at San Jose and Austin, California
Senior Analog Design Engineers #5337 for EDA Careers at EAST COAST, California
Senior Physical Design/Layout Engineer for EDA Careers at EAST COAST, California
Upcoming Events
57th Design Automation Conference 2020 at San Francisco CA - Jul 19 - 23, 2020
SEMICON West 2020 - Virtual Event at - Jul 20 - 23, 2020
Semicon Southeast Asia 2020 at MITEC Kuala Lumpur Malaysia - Aug 11 - 13, 2020
Drive World Conference & Expo at Santa Clara Convention Center Santa Clara CA - Aug 11 - 13, 2020
DownStream: Solutions for Post Processing PCB Designs
Verific: SystemVerilog & VHDL Parsers

© 2020 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise