Effective Audit of Testbenches with AMIQ’s Verissimo SystemVerilog Testbench Linter

AMIQ showcasing the DVT IDE and Verissimo SystemVerilog Testbench Linterat DVCon 2012, in San Jose, CA, February 28-29, booth #704

February 28, 2012, San Jose, California – AMIQ EDA, a pioneer in integrated development environments (IDEs) for hardware design and verification, today announced the release of the Verissimo SystemVerilog Testbench Linter, a coding guideline and verification methodology compliance checker that enables engineers to perform an effective audit of their testbenches and helps them meet the requirements of today’s complex functional verification.

With the Verissimo linter, verification engineers can check whether their code is free of language pitfalls and semantic or style issues as well as compliant with the appropriate methodologies, such as the Universal Verification Methodology (UVM), for instance. Verissimo can also be customized to check specific corporate coding guidelines to ensure consistency and best practices in code development at the company level.

The tool provides a comprehensive library of generic SystemVerilog and UVM checks. The UVM compliance-checking rules are written in accordance with the verification methodology guidelines from the UVM World ( www.uvmworld.org). Users can create custom rule sets by selecting from the hundreds of built-in checks those that correspond to their requirements. They can also create new rules by using a dedicated Java application programming interface (API) delivered with the linter.

Verissimo runs both in batch and GUI modes and integrates with AMIQ’s Design and Verification Tools (DVT) integrated development environment (IDE). Users can perform linting and then visualize the results in the DVT’s GUI, which offers an easy way to read and understand the error and warning messages. In addition, the DVT’s code navigation features, such as hyperlinks, allow the users to jump instantly to the problematic source line to fix the issue flagged by the linter.

In summary, AMIQ’s Verissimo testbench linter can be customized to meet the demands of small teams up to larger verification groups and global companies. It helps improve testbench code reliability, functionality, and maintainability. The seamless integration between the Verissimo linter as a code analysis tool and the DVT IDE as a code development tool further improves the verification productivity and quality. It also contributes to decreasing the significant costs associated with code maintenance. 

About AMIQ EDA

AMIQ EDA has pioneered the integrated development environments (IDEs) in the hardware design and verification world.  Since 2006, its Design and Verification Tools (DVT) platform – the first IDE for e, SystemVerilog, and VHDL – has helped engineers increase the speed and quality of code development and simplify maintenance, enabling them to complete their projects faster.  DVT integrates with all major simulators and supports verification methodologies like UVM, OVM, and VMM.

AMIQ EDA serves customers around the world and strives to deliver high quality solutions and customer service responsiveness, while maintaining a friendly and flexible environment. For further information please visit www.dvteclipse.com.

 

Press Contacts:

Europe:

Cristian Amitroaie

+40-721-284-254

Email Contact

 

USA

Corina Mitu

+1-408-688-4747

Email Contact




Review Article Be the first to review this article
Aldec


Featured Video
Editorial
More Editorial  
Latest Blog Posts
Anupam BakshiAgnisys Automation Review
by Anupam Bakshi
Functional Safety and Security in Embedded Systems
Bob Smith, Executive DirectorBridging the Frontier
by Bob Smith, Executive Director
Phil Kaufman Award Goes on Hiatus for 2020
Colin WallsEmbedded Software
by Colin Walls
Why develop embedded software bottom up?
Jobs
ASIC Design Integration Engineer for Apple Inc at Cupertino, California
Wireless ASIC Design Engineer for Apple Inc at Cupertino, California
Technical Marketing Mmanager for EDA Careers at Fremont, California
Product Line Manager for EDA Careers at Multiple, North Carolina
Senior Analog IC Design Engineer for Marvell Semiconductor at Santa Clara, California
ASIC Design Engineer, for Apple Inc at Cupertino, California
Upcoming Events
Accellera Day India 2020 at Online Event India - Dec 2 - 3, 2020
RISC-V Summit 2020. at United States - Dec 7 - 10, 2020
SEMICON Japan 2020 Goes Virtual at Japan - Dec 11 - 18, 2020
IPC APEX EXPO 2021 at San Diego Convention Center san diego - Mar 6 - 11, 2021
TrueCircuits:



© 2020 Internet Business Systems, Inc.
670 Aberdeen Way, Milpitas, CA 95035
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise