SpringSoft Technology Newsletter - Q1 2012

SpringSoft Technology Newsletter - Q1 2012

Welcome to the SpringSoft Technology Newsletter. This newsletter is distributed to our customers, partners and friends to provide information about our Novas Verification Enhancement and Laker Custom IC Design technologies. We hope the information in this newsletter will help you to use our products more effectively in your design and verification environments.

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Please see the links at the end of this newsletter for subscription information.

 

 


  Verification Enhancement

  Verdi 3 Third-Generation Debug Platform Debuts

On March 5th, SpringSoft  unveiled Verdi3, the third generation of our market-leading debug automation software.  The new Verdi3 product is an open platform that introduces user personalization, customization, and enhanced interoperability to create a powerful debug cockpit. In addition, it is built on next-generation software architecture for significant performance and capacity gains.

 

 

 

In order to keep pace with the increasing complexity and size of digital ICs, as well as the sophisticated methodologies used to verify them, existing debug solutions must be re-tooled to maximize user productivity and better reflect the way engineers work in evolving functional verification environments. SpringSoft’s Verdi3 platform addresses these requirements by delivering a two-fold performance increase with files that are at least 30% smaller than the previous generation, and enabling users to personalize the debug environment and seamlessly integrate custom applications created with Verdi Interoperability Apps (VIA)  for rapid and reliable deployment.

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Custom IC Design

Chip Finishing With New Laker Blitz Product

As you probably heard by now, SpringSoft recently announced Laker™ Blitz, a new product targeting chip finishing applications and the latest addition to our popular family of Laker custom IC design and layout automation solutions. The Laker Blitz product enables high-speed viewing and editing of chip-level layouts to streamline tapeout-to-manufacturing operations. It is ideally suited for designs with massive data sets, such as advanced-node system-on-chip (SoC) implementations and large memory chips that are widely used in consumer electronics.  Early adopters are using Laker Blitz for a variety of chip finishing applications including IP merging, SoC assembly, and chip-level DRC reviews.

 

                                            

Laker Blitz

 

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Laker Custom Layout + Calibre RealTime = Award-Winning Interoperability

It has been very gratifying to have two major organizations, Electronic Design Magazine and DesignCon recognize the Laker Custom Layout-Calibre® RealTime integration as both innovative and unique with the Electronic Design Magazine Best Electronic Design 2011 Award, and UBM Electronics DesignCon DesignVision Award 2012, respectively.

 

 


 

 

Verification Enhancement Tips

 

  Improved VIA Integration with Verdi 3

 

As you know, VIA allows you to write your own debug and analysis applications using Tcl and/or C. The Verdi3 platform makes it even easier to access VIA information and invoke applications while debugging. VIA documentation and source code are available from the VIA Exchange web-site that can be accessed directly from the Verdi3 Welcome page: Just select Documentation and then VIA Exchange). Furthermore, it is very simple to create a dedicated new menu command and/or bind-keys to execute a VIA script in the Verdi3 GUI. For example, you can invoke the Tools à Customize Menu/Toolbar command to open the Custom Command form, and specify a Tcl or Shell script to be sourced, and then easily create a customized menu command in the GUI as in the following example:

 


 

News

 

March 28, 2012 - SPRINGSOFT ANNOUNCES THAT STMICROELECTRONICS USES VIA PLATFORM TO BUILD CUSTOM VERIFICATION APPLICATIONS FOR CHIP DEVELOPMENT FLOW

 

March 27, 2012 - Time to rethink EDA flows and tool infrastructure

 

March 5, 2012 - SpringSoft Delivers Breakthrough Productivity with Third-Generation Debug Platform

 

February 27, 2012 - SpringSoft and Synopsys Link Debug Technologies to Speed Protocol Verification for SoC Designs

 

December 22, 2011 - SpringSoft’s Laker Signoff-Driven Custom Layout Flow with Calibre RealTime DRC Wins Best Electronic Design 2011 Award

 

November 29, 2011 - SpringSoft Targets Chip-Finishing Applications with New Laker Blitz

 

 

Upcoming events

DAC 2012 - June 3-7, 2012
 

Support

For Novas products and Certitude products, we have dropped support for following platforms beginning in 2012.01:
Redhat 3  (RHEL3)
SuSE 9  (SLES9)

To check on the latest product revisions, or get first class product support: Go to http:// www.springsoft.com/support



Latest Product Versions:

Functional Closure:
Verdi3 2012.01 (general beta)
Verdi/Siloti 2012.01
ProtoLink Probe Visualizer 2012.03
Certitude: 2012.01p2

Custom IC Design:
Laker proprietary database (aka Laker-DB):
Laker-2011.06p1
Laker_ADP-2011.06p1
Laker_TCD-201105 (Laker-T1)
Laker Blitz 2012.01
 
Laker OpenAccess:
Laker-OA2011.08p1
Laker_ADP-OA2011.08p1

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