The IPL Alliance, which includes members from major electronic design automation (EDA), semiconductor and foundry companies, released IPL 1.0, the industry's first open standard for iPDKs, in 2010. IPL 2.0 uses the same specification of the standard and adds a new 40-nm reference iPDK in addition to the 90-nm reference iPDK in IPL 1.0. The iPDK standard is based on the OpenAccess database and uses standard languages and a unified architecture to enable interoperability among all EDA vendor tools. Engineering teams only need to develop a single PDK for each process node, which reduces development costs, shortens design cycles and provides designers with earlier access to advanced process technologies across multiple tools. IPL Alliance members are validating IPL 2.0 now, and it is targeted for public download by end of year 2012.
The IPL Constraint Working Group includes members from Altera, Ciranova, Mentor Graphics, Pulsic, SpringSoft, Synopsys and TSMC. Additionally, Xilinx and STMicroelectronics are acting in an advisory role. The working group has delivered the IPL Constraints 1.1 in 2011 and now is planning for its next phase by soliciting donations of additional constraint types for the next version of the standard to meet emerging design challenges. Ed Petrus, the newly appointed chair, has more than 25 years of experience in the EDA industry. Prior to joining Mentor Graphics, Mr. Petrus was the co-founder of Ciranova, a board member company of the IPL Alliance. He is also the vice-chair of Si2's OPDK initiative.
"IPL Alliance members continue collaborating to create and promote standards for an interoperable custom design ecosystem," said Jingwen Yuan, president of the IPL Alliance and strategic alliance manager at Synopsys. "We are seeing broad adoption of the iPDK standard by EDA companies that offer iPDK-compliant tools and foundries that deliver iPDKs to their customers. We are excited to have EDA veteran Ed Petrus lead the IPL Constraint Working Group and look forward to the next major release of the constraint standard."
The IPL Alliance will present IPL 2.0 and the latest updates regarding its working groups at the 49th DAC in San Francisco, California. The IPL Luncheon is scheduled for Tuesday, June 5, from 12:00 p.m. to 1:30 p.m. in the Golden Gate Ballroom B at the Marriott Hotel in San Francisco. The IPL Alliance is also featured in the Standards Booth #1170. Please visit the IPL website at http://www.IPLnow.com to register for IPL DAC events.
About the IPL Alliance
The IPL Alliance is an industry standards organization established to develop an interoperable ecosystem for custom design by creating and promoting interoperable PDK standards. There are currently 30 semiconductor and EDA company members. For more information, please visit the IPL Alliance website at http://www.IPLnow.com or contact Email Contact
SOURCE IPL Alliance