Tanner EDA: Boost MEMS Design Productivity with Free Upgrade to Design Rule Checking

MONROVIA, California – February 1, 2013 – Tanner EDA, the catalyst for innovation for the design, layout and verification of analog and mixed-signal integrated circuits (ICs), has been delivering complete hierarchical physical layout editing to MEMS designers for 24 years. L-Edit MEMS combines fast rendering and easy-to-use features for built-in productivity, allowing maximum efficiency in layout design.

From now until March 29th, Tanner EDA is offering a free upgrade from L-Edit MEMS to an L-Edit MEMS Design package that further boosts productivity and reduces time to market by adding design rule checking (DRC) to L-Edit MEMS. By applying DRC at layout, design errors are caught before manufacturing, and design teams:

  • Save on external foundry costs -- reducing the risk of foundry re-spins.
  • Save on internal labor costs -- keeping the wheels in motion and focusing resources on revenue-generating projects rather than error fixes design re-works.
  • Speed time to market -- avoiding production rescheduling and reworks, thus ensuring maximum ROI for each design.

Tanner MEMS design tools run on both the Windows and Linux platforms and offer powerful features and capabilities that enable an efficient and productive workflow.

A webinar on L-Edit MEMS Design is available at: http://www.tannereda.com/mems

For information on the free upgrade, please see: http://www.tannereda.com/leditmemsupgrade  

About Tanner EDA

Tanner EDA provides a complete line of software solutions that drive innovation for the design, layout and verification of analog and mixed-signal (A/MS) integrated circuits (ICs) and MEMS. Customers are creating breakthrough applications in areas such as power management, displays and imaging, automotive, consumer electronics, life sciences, and RF devices. A low learning curve, high interoperability, and a powerful user interface improve design team productivity and enable a low total cost of ownership (TCO). Capability and performance are matched by low support requirements and high support capability as well as an ecosystem of partners that bring advanced capabilities to A/MS designs.

Founded in 1988, Tanner EDA solutions deliver just the right mixture of features, functionality and usability. The company has shipped over 33,000 licenses of its software to more than 5,000 customers in 67 countries.

HiPer Verify and HiPer Silicon are trademarks of Tanner Research, Inc.

All other trademarks and trade names are the property of their respective owners.

###

 




Review Article Be the first to review this article
Aldec


Featured Video
Jobs
Senior Software Architect Internet for EDA Careers at San Jose, California
Hardware Engineer, Board Design for Arista Networks at Santa Clara, California
Sr. Application Engineer for Mentor Graphics at Fremont, California
Senior Account Managers… FORMAL VERIFICATION...VALLEY for EDA Careers at San Jose, California
Salesforce Technical Lead   East Coast  for EDA Careers at Cherry Hill, New Jersey
Upcoming Events
FLEX 2020 and MSTC 2020 at DoubleTree by Hilton 2050 Gateway Place San Jose CA - Feb 24 - 27, 2020
DVCon U.S. 2020 at DoubleTree Hotel San Jose CA - Mar 2 - 5, 2020
OFC 2020 - The Optical Networking and Communication Conference & Exhibition at San Diego Convention Center San Diego CA - Mar 8 - 12, 2020
DATE '2020 at ALPEXPO Grenoble France - Mar 9 - 13, 2020



© 2020 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise