Virtual Silicon Cuts Leakage 250x With Mobilize

First Power Management IP Solution Extends Moore's Law into the Nanometer Era

SUNNYVALE, Calif., - July 12, 2004 - Virtual Silicon Technology, Inc., a leader in semiconductor intellectual property, today introduced Mobilize(TM), the industry's first complete power management intellectual property (IP) platform to reduce dynamic and static (leakage) power of systems on chip (SoC). Mobilize is targeted to help SoC designers working in the battery-powered, mobile application space manage power, extending Moore's law beyond the power barriers at 130nm process technology and below.

The Mobilize Power Management IP platform provides an adaptive, dynamically configurable solution for reducing both static and dynamic power in 130nm SoC. Virtual Silicon's patented Gate Bias(TM) technology is the key element within Mobilize. In gate biasing, the leakage of the cell is reduced by over 250X on a standard 130nm process (generic) with no sacrifice to the performance of the SoC. Gate Bias can be used independently on power islands and includes data retention flip-flops so there is no loss of state. Gate Bias can be turned on and off in as little as 20ns, allowing designers greater opportunity for leakage reduction.

"Virtual Silicon's Mobilize is the first and only commercially available solution to resolve the power crisis at 130nm and 90nm without compromising performance or cost," said Barry Hoberman, president and CEO of Virtual Silicon. "The combination of Mobilize-enabled foundation IP with higher level, power management IP offers processor-based designers significant architectural opportunities for reducing leakage."

Customer analysis has shown that Gate Bias technology can reduce the leakage of a 1 million-gate power island from 2.21 milliamps to just 8.3 microamps. In addition to cutting leakage, Mobilize is shown to reduce the dynamic power of an SoC by over 80 percent through the use of dynamic voltage and frequency scaling.

Virtual Silicon's Mobilize IP continues the collaboration between Virtual Silicon and National Semiconductor Corp. on PowerWise(R) technology. "Our PowerWise(TM) technology is enabling SoC designers to greatly extend the battery life of portable devices. The unique capabilities of Mobilize power management IP, by Virtual Silicon a PowerWise Interface (PWI) adopter, places a powerful tool in the hands of SoC designers.", said Peter Henry, vice president of portable power systems.

Mobilize is endorsed by leading foundries, EDA companies, power management integrated circuits suppliers and IP companies. Virtual Silicon further disclosed that initial customers are actively designing SoC with Mobilize IP and anticipate end-of-year design tape-outs.

The complete 130nm process technology Mobilize IP Platform is currently available for license download on the Virtual Silicon website ( All IP elements are tape-out ready, so designers can start using Mobilize immediately to save power on their current SoC designs. A full test chip report for 130nm will be available in September 2004. The 90nm Mobilize Power Management IP Platform will be tape-out ready by the 1Q05.

About Virtual Silicon Technology
Virtual Silicon is a leading supplier of semiconductor intellectual property technology to manufacturers and designers of complex systems-on-chip (SoC). Headquartered in Sunnyvale, CA, the company provides process-specific embedded components that serve the wireless, networking, graphics, communication and computing markets. Customers include leading fabless semiconductor companies, integrated semiconductor manufacturers, foundries, and SoC developers who demand leading edge technology for their semiconductor innovations. For more information, call (408) 548-2700 or visit Virtual Silicon online at

Mobilize, Gate Bias, Your Source for IP, VIP, Silicon Ready, The Heart of Great Silicon and Virtual Silicon are trademarks of Virtual Silicon Technology, Inc.

For more information contact:
John A. Ford, VP Marketing
Virtual Silicon
(408) 548-2737
Email Contact

Lou Covey
VitalCom Marketing and PR
(650) 637-8212 x202
Email Contact


Quote Page

Synopsys; Bijan Kiani, vice president of marketing, Synopsys Implementation Group "At 90 nanometers and below, the need for superior dynamic and leakage power reduction has become mission-critical for power-efficient design," said Bijan Kiani, vice president of marketing, Synopsys Implementation Group. "Pairing Synopsys' Galaxy Power with Virtual Silicon's Mobilize IP benefits our mutual customer base by providing an advanced low power solution for implementing techniques such as power islands and gate biasing in their latest SoC designs."

In-Stat MDR; Gerald S. (Jerry) Worchel, Principal Analyst. "With our world rapidly moving more and more into the mobile (or portable) space, battery life or product power dissipation have become of increasingly higher concern. In large part, this power issue is the result of rapidly increasing leakage currents at and below the 130-nanometer node. This announcement by Virtual Silicon presents their approach to power management, which will be one of the keys to IC, product, and hence, company success in the future."

Cadence; "Power has become a key concern in nanometer silicon," said Eric Filseth, vice president of product marketing for the Cadence Encounter™ digital IC design platform. "Cadence and Virtual Silicon collaborated to integrate the Mobilize IP into the Encounter platform's low-power design flow. This solution helps our customers implement aggressive low-power strategies quickly, even on very large SoC."

ARM; John Cornish, director of product marketing, "Having already hardened several different ARM cores and other IP blocks using Virtual Silicon standard cells, ARM has first-hand knowledge of Virtual Silicon's capability. Virtual Silicon's Mobilize IP is a key element in the proliferation of the ARM Intelligent Energy Manager(TM) (IEM) technology."

Magma-SCD; Vess Johnson, general manager, Magma's Silicon Correlation Division, "The Mobilize platform is the most effective solution for reducing static and dynamic power I have seen."

MoSys; Dr. Fu-Chieh Hsu, president and CEO, "MoSys is addressing the requirements of SoC designers to reduce power consumption in the latest generation processes while minimizing chip cost with our innovative 1T-SRAM-M(TM) and 6T-SRAM-R(TM) memory technologies. We are pleased to partner with Virtual Silicon's Mobilize Power Management IP to offer customers a complete power-optimized solution."

Tensilica; Chris Rowen, president and CEO, "Tensilica has demonstrated that the combination of our Xtensa(TM) microprocessor and Virtual Silicon's Mobilize IP can produce significant power savings for our customers."

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