Thursday is Training Day at the 53rd Design Automation Conference

Technical training tracks presented by Doulos along with expanded tracks on management & professional training by University of Texas at Austin

LOUISVILLE, Colo. — (BUSINESS WIRE) — May 3, 2016 — The Design Automation Conference (DAC) once again will host Thursday is Training Day at the 53rd DAC, held this year from June 5 to June 9, 2016 in the Austin Convention Center in Austin, Texas.

For over 50 years DAC has offers outstanding education, exhibits and networking opportunities for designers, researchers, tool developers and vendors. Thursday is Training Day is one of the many ways the user/design community can be trained on the very latest design techniques. This year training day has been expanded to include management and professional sessions taught by experts from the University of Texas, Austin, Executive Education.

Thursday Is Training Day at DAC is a once-a-year opportunity for attendees to take advantage of some excellent training and insights at the end of a conference full of tutorials, presentations, workshops, vendor information and just plain fun,” said Chuck Alpert, 53rd DAC General Chair. “We are fortunate once again to have Doulos, the global leader in the development and delivery of training solutions for electronic system design, join speakers from industry and the University of Texas at Austin.”

Training on Thursday, June 9, provides engineers with the latest technical, management and professional techniques and ideas required for today’s designs. Organized into separate subject-specific tracks, each track comprises two separate half-day sessions: in the morning from 10:15am to 1:15pm and in the afternoon from 2:15pm to 5:15pm. The full training schedule and location details can be found at

Morning tracks include:

  • Track 1, Part I: How to Build Class-based Verification Environments in SystemVerilog with speaker John Aynsley of Doulos
  • Track 2, Part I: SystemVerilog Synthesis Tuned for ASIC and FPGA Design with speaker David Black of Doulos
  • Track 3, Part I: Introduction to Embedded Security: Making Security Hard: Hardware Security and How to Use It with speaker Carl Shaw of MathEmbedded Ltd.
  • Track 4, Part I: Taking Your C++ to the Next Level organized by John Croix of Cadence Design Systems with speakers Jason Cohen and Zach Laine of NVIDIA and Tim Simpson of Rackspace US
  • Track 5, Part I: Finding Creative Solutions to Complex Problems with speaker Gaylen Paulson of the University of Texas at Austin

Afternoon tracks include:

  • Track 1, Part II: Learn UVM Using the Easier UVM Coding Guidelines and Code Generator with speaker John Aynsley of Doulos
  • Track 2, Part II: The Definitive Guide to SystemC TLM-2.0: Learn the Technology Standard that Underpins Virtual Platforms with speaker David Black of Doulos
  • Track 3, Part II: Introduction to Embedded Linux Security: Keys to Understanding Vulnerabilities in Embedded Systems and How to Secure Them with speaker Adrian Thomasset of Doulos
  • Track 4, Part II: Taking Your C++ to the Next Level, Part II organized by John Croix of Cadence with speakers Paul Fultz II from Advanced Micro Devices and Zach Laine of NVIDIA
  • Track 5, Part II: Maximizing Mental Agility with speaker Art Markman of the University of Texas at Austin

See for Thursday Is Training Day registration details.

About DAC

The Design Automation Conference ( DAC) is recognized as the premier event for the design of electronic circuits and systems and for electronic design automation (EDA). Members of a diverse worldwide community from more than 1,000 organizations attend each year, represented by system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives, and researchers and academicians from leading universities. Close to 60 technical sessions selected by a committee of electronic design experts offer information on recent developments and trends, management practices and new products, methodologies and technologies. A highlight of DAC is its exhibition and suite area with approximately 200 of the leading and emerging EDA, silicon, intellectual property (IP) and design services providers. The conference is sponsored by the Association for Computing Machinery (ACM), the Electronic Design Automation Consortium (EDA Consortium), and the Institute of Electrical and Electronics Engineers (IEEE), and is supported by ACM's Special Interest Group on Design.

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