The silicon manufacturing process has random variations that cannot be controlled, resulting in unique characteristics from chip-to-chip. These variations are within the tolerances built into the design, and do not affect the overall functions of the chip. Physical Unclonable Functions (PUF) are tiny circuits that exploit these chip-unique variations. In the Xilinx Zynq UltraScale+ MPSoC devices, PUF circuits utilize this manufacturing "fingerprint" to generate unique keys that are then used to secure firmware load operation during the boot process.
"We are pleased to leverage Verayo's PUF expertise in our 16nm FinFET-based Zynq UltraScale+ MPSoC devices," said Sumit Shah, Senior SoC Product Line Manager at Xilinx. "This new PUF IP adds another layer of security to the extensive Secure Boot process built into the Zynq Ultrascale+ MPSoC."
PUF technology was invented and first implemented at MIT by Prof. Srini Devadas, co-founder of Verayo. Verayo's PUF technology has been used in multiple government and defense programs, as well as consumer products, and has gone through a wide range of military, industrial, and commercial grade testing. Verayo's PUF authentication and key generation technology has been implemented in FPGAs, ASICs, and NFC RFIDs across a wide range of process nodes from 0.18µ to 16nm, with over 40M PUF chips characterized and shipped.
"We believe the use of silicon manufacturing variation as a root of trust will become commonplace as cloud-connected IoT, and consumer devices become more prevalent," commented Anant Agrawal, Verayo, CEO. "We are pleased with the silicon characterization results to date associated with temperature, voltage, and aging, for the Zynq UltraScale+ MPSoC products. Xilinx has helped us gain visibility with silicon results at very advanced process nodes to help drive our solution to 16nm and below," added Mandel Yu, Verayo Chief Scientist.
Verayo was founded in Silicon Valley in 2005. The company is focused on building hardware and cloud/mobile software security and authentication solutions based on silicon Physical Unclonable Functions (PUF) technology, which was invented and first implemented at MIT by Prof. Srini Devadas and his team. Since its founding, the Verayo team has built-up a growing body of additional IP and substantive know-how beyond the initial IP that Verayo licensed exclusively from MIT, with an aggregate of over 30 granted patents and many more pending. In addition to implementing silicon PUFs for authentication and key generation applications encompassing process nodes from 0.18µ to 16nm, Verayo also has complementary mobile and cloud-based software to support over 40M PUF ICs shipped. Verayo is funded by Khosla Ventures.
For more information, please visit www.verayo.com
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