Leti to Present Latest R&D Results on Three Alternatives to EUV and 193nm Lithography at SPIE Meeting in US

One Paper Will Recount Leti’s Success Reducing Defectivity in Directed Self-Assembly Lithography Technique

GRENOBLE, France – Feb. 22, 2017 – In keeping with its mission to develop photolithography alternatives for advanced technology nodes and offer competitive solutions adapted to specific applications, Leti is developing technologies for directed self-assembly lithography (DSA), massively parallel electron beam lithography and nanoimprint lithography.

Leti, a research institute at CEA Tech, will present its latest results in these approaches for fabricating advanced CMOS and silicon photonics devices and sensors in several papers at the SPIE Advanced Lithography conference in San Jose, Calif., Feb. 26-March 2.

The ongoing collaborations with leading industry-equipment companies are designed to offer integrated circuit manufacturers complementary and/or alternative patterning solutions to 193nm immersion lithography and extreme-UV (EUV) technologies. While 193nm immersion technology supports the industry preference for advanced-node developments, it requires a very demanding effort to ensure reliable process controls. EUV’s widespread adoption remains uncertain because its infrastructure still requires significant development and because of questions about its associated cost of ownership.

Leti’s lithography collaborative R&D programs cover three domains:

  • IDEAL: directed self-assembly (DSA) lithography
  • IMAGINE: massively parallel electron beam lithography
  • INSPIRE: nanoimprint lithography

“Lithography alternatives hold promise for continued R&D because they may present competitive compromises for the industry,” said Stéfan Landis, lead author of the paper “Nanoimprint, DSA and Multi-Beam Lithography: Patterning Technologies with New Integration Challenges”.

“Massively parallel electron-beam and nano-imprint lithography techniques remain highly attractive because they can provide noteworthy cost-of-ownership benefits. In addition, directed self-assembly lithography shows promising resolution capabilities and appears to be an option to reduce multi-patterning strategies, and the associated high costs for mask-sets.”

A paper with STMicroelectronics and Arkema, “Advanced Surface Affinity Control for DSA Contact Hole Shrink”, focuses on efforts to resolve defectivity, a major challenge for DSA integration. State-of-the-art DSA-related defectivity values remain at least one to two orders of magnitude higher than industrial specifications. The paper recounts Leti’s success at reducing defect density using a DSA graphoepitaxy process flow dedicated to contact hole applications with polystyrene-b-poly(methyl methacrylate) block copolymers.

In addition to its joint papers with partners, Leti will present one invited paper, four oral talks and four posters. It also has been invited to present a poster at LithoVision 2017, which is organized by Nikon. LithoVision is a technical event that precedes the SPIE conference and brings industry experts together to share a global view of lithography trends, challenges, and innovations.

Leti presentations at SPIE:

Invited paper

Advanced Etch Technology for Nanopatterning VI (Conference 10149)

Session 6: Novel Plasma Patterning Techniques

“Nanoimprint, DSA and Multi-Beam Lithography: Patterning Technologies with New Integration Challenges”

Paper 10149-20

4:10 pm - 5:50 pm

Feb. 28, Marriott, San Jose Salon III

Joint papers

Emerging Patterning Technologies 2017 (Conference 10144)

Session 3: Nanoprint Masks and Applications

“New 3D structuring process for non-integrated circuit related technologies”

Paper 10144-11

11:20-11:40 am

Feb. 28

Convention Center 210B

Session 5: Direct-Write, Maskless Lithography

“Overlay performance of MAPPER's FLX-1200”

Paper 10144-22

5:10-5:30 pm

Feb. 28

Convention Center 210B

Session 6: DSA Process and Integration

“Advanced surface affinity control for DSA contact hole shrink”

Paper 10144-23

8:50-9:10 am

March 1

Convention Center 220C

Session 11: DSA Novel Materials

“A track process for solvent annealing of high- χ  BCPs” 

Paper 10146-31
Time: 2:30-2:50 pm

March 1

Convention Center 220C

Session PSTue

6:00-8:00 pm
Feb. 28
Convention Center Hall 2

  • “DSA Materials In-Film Defectivity Advanced Investigation”
  • “DSA Process Window Extension Via Controlled Atmospheric Conditions Through Accurate Defectivity and Roughness Measurements”
  • “The 300mm Evaluation of a 38nm Period Lamellar PS-b-PMMA for L/S Applications with Graphoepitaxy”
  • “Rules-Based Correction Strategies Setup on Sub-Micrometer Line and Space Patterns for 200mm Wafer Scale SmartNILTM Process within an Integration Process Flow”

About Leti

Leti, a technology research institute at CEA Tech, is a global leader in miniaturization technologies enabling smart, energy-efficient and secure solutions for industry. Founded in 1967, Leti pioneers micro-& nanotechnologies, tailoring differentiating applicative solutions for global companies, SMEs and startups. Leti tackles critical challenges in healthcare, energy and digital migration. From sensors to data processing and computing solutions, Leti’s multidisciplinary teams deliver solid expertise, leveraging world-class pre-industrialization facilities. With a staff of more than 1,900, a portfolio of 2,700 patents, 91,500 sq. ft. of cleanroom space and a clear IP policy, the institute is based in Grenoble, France, and has offices in Silicon Valley and Tokyo. Leti has launched 60 startups and is a member of the Carnot Institutes network. This year, the institute celebrates its 50th anniversary. Follow us on www.leti.fr/en and @CEA_Leti.

CEA Tech is the technology research branch of the French Alternative Energies and Atomic Energy Commission (CEA), a key player in innovative R&D, defense & security, nuclear energy, technological research for industry and fundamental science. In 2015, Thomson Reuters identified CEA as the most innovative research organization in the world.

Press Contact:
Agency
+33 6 74 93 23 47                          
Email Contact



Read the complete story ...


Review Article Be the first to review this article
Featured Video
Editorial
More Editorial  
Latest Blog Posts
Bob Smith, Executive DirectorBridging the Frontier
by Bob Smith, Executive Director
Breaking Down Chip Design Functional Verification with Breker’s Adnan Hamid
Anupam BakshiAgnisys Automation Review
by Anupam Bakshi
Welcome Back to DAC – in Person – in San Francisco
Vincent ThibautArteris IP Blog
by Vincent Thibaut
Why Automate Traceability?
Jobs
Pre-silicon Design Verification Engineer for Intel at Santa Clara, California
Technical Product Manager- SISW-EDA 238452 for Siemens AG at Fremont, California
Senior HID Sensor Algorithm Architect for Apple Inc at Cupertino, California
Senior Staff Field Application Engineer for Global Foundaries at Santa Clara, California
Circuit Design & Layout Simulation Engineer - Co-Op (Spring 2021) for Global Foundaries at Santa Clara, California
Sr Engineer - RF/mmWave IC Design for Global Foundaries at Santa Clara, California
Upcoming Events
67th Annual IEEE International Electron Devices Meeting at Hilton San Francisco Union Square hotel San Francisco - Dec 11 - 15, 2021
67th Annual International Electron Devices Meeting at Hilton San Francisco Union Square Hotel San Francisco, CA - Dec 13 - 15, 2021
DVCon India 2021 at India - Dec 14 - 16, 2021
SEMICON Japan 2021 Hybrid at Tokyo Big Sight / Online Tokyo Japan - Dec 15 - 17, 2021



© 2021 Internet Business Systems, Inc.
670 Aberdeen Way, Milpitas, CA 95035
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise