Arteris is now ArterisIP

CAMPBELL, Calif. — March 30, 2017  — Arteris Inc., the innovative supplier of silicon-proven commercial system-on-chip (SoC) interconnect IP, today announced that it will now be known as ArterisIP.

The name change reflects ArterisIP’s goal of delivering all types of advanced on-chip communications technologies for modern SoCs. As semiconductor markets and technologies have evolved, it has become imperative to address the entire spectrum of on-chip communications requirements in a flexible yet integrated manner. Over the past four years, ArterisIP’s technology offerings have grown from the  backbone on-chip SoC interconnect to also include  cache coherent interconnects functional safety and resilience mechanisms, and  automated timing closure capabilities. This combination of technologies allows ArterisIP customers to assemble SoC IP blocks into chips with higher levels of performance, lower power and smaller area, leading to lower R&D and unit costs. 

“The ArterisIP name change reflects our goal of delivering semiconductor intellectual property that enables advanced on-chip communications and die-to-die communications for all SoC markets - worldwide,” said K. Charles Janac, President and CEO of ArterisIP. “We are building on our reputation for quality, leading market share, and foundational network-on-chip technology to pioneer trailblazing advances in on-chip communications to support our customer’s success.”

About ArterisIP

ArterisIP provides  system-on-chip (SoC) interconnect IP to accelerate SoC semiconductor assembly for a wide range of applications from IoT to mobile phones, cameras, automobiles, SSD controllers and servers for customers such as  SamsungHuawei / HiSiliconMobileyeAltera (Intel), and  Texas Instruments. ArterisIP products include the  Ncore cache coherent and  FlexNoC non-coherent interconnect IP, as well as optional  Resilience Package (functional safety) and  PIANO automated timing closure capabilities. Customer results obtained by using the ArterisIP product line include lower power, higher performance, more efficient design reuse and faster SoC development, leading to lower development and production costs. For more information, visit or find us on LinkedIn at



Kurt Shuler
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