Acacia Communications Reduces Simulation Regression Turnaround Time by 2X Using Synopsys VCS Fine-Grained Parallelism Technology for High-Speed Optical Interconnect SoCs

MOUNTAIN VIEW, Calif., May 18, 2017 — (PRNewswire) — Synopsys, Inc. (NASDAQ: SNPS) today announced that Acacia Communications has successfully deployed Synopsys VCS Fine-Grained Parallelism (FGP) technology in production, to reduce regression turnaround time (TAT) by 2X. With its seamless integration into Acacia's VCS simulation regression environment on existing X86 hardware platform, VCS FGP delivered these simulation performance gains without any changes or disruption to the existing simulation flow.

"In order to perform comprehensive verification of our high-speed optical networking and interconnect products, we run daily simulation regressions that include more than 2000 complex test scenarios," said Jon Stahl, ASIC Manager at Acacia Communications. "With VCS FGP we reduced our regression TAT from 20 hours to under 12 hours, leaving our engineers with a full 12-hour window to analyze and fix any failures before the next regression run. This has resulted in a significant productivity boost for our verification efforts."

VCS FGP technology uses existing multi-core and many-core x86 CPU platforms to accelerate simulation performance. FGP is native to VCS simulation engines, therefore no changes or disruption to the existing simulation flows is required. All existing VCS features such as save-restore, NLP, X-Propagation simulation, and Verdi® debug with parallel FSDB continue to work as before with no changes necessary to the design or testbenches.

"We continue to extend our market leadership in simulation performance and innovate on our VCS FGP technology," said Ajay Singh, vice president of engineering for the Synopsys Verification Group. "As our customers deploy VCS FGP in production, they achieve significant productivity and TAT gains with these performance innovations."

About Synopsys

Synopsys, Inc. (Nasdaq: SNPS) is the Silicon to Software partner for innovative companies developing the electronic products and software applications we rely on every day. As the world's 15th largest software company, Synopsys has a long history of being a global leader in electronic design automation (EDA) and semiconductor IP and is also growing its leadership in software security and quality solutions. Whether you're a system-on-chip (SoC) designer creating advanced semiconductors, or a software developer writing applications that require the highest security and quality, Synopsys has the solutions needed to deliver innovative, high-quality, secure products. Learn more at  www.synopsys.com.

Editorial Contacts:
Carole Murchison
Synopsys, Inc.
650-584-4632
carolem@synopsys.com

To view the original version on PR Newswire, visit: http://www.prnewswire.com/news-releases/acacia-communications-reduces-simulation-regression-turnaround-time-by-2x-using-synopsys-vcs-fine-grained-parallelism-technology-for-high-speed-optical-interconnect-socs-300459783.html

SOURCE Synopsys, Inc.

Contact:
Synopsys, Inc.
Acacia Communications
Web: http://www.synopsys.com




Review Article Be the first to review this article
Aldec

Featured Video
Latest Blog Posts
Bob Smith, Executive DirectorBridging the Frontier
by Bob Smith, Executive Director
Connecting Design to Manufacturing
Colin WallsEmbedded Software
by Colin Walls
Selecting a CPU
Jobs
Sr. Electrical Hardware Project Engineer for Stellartech Research Corp at Milpitas, California
Mid to Senior Level Electrical Engineer for Gordon Prill, Inc at Santee, California
Principal Engineer, Firmware Engineering for Western Digital at Milpitas, California
Product Applications Engineer for DiCon Fiberoptics, Inc. at Richmond, California
Nano-Optics Process Engineer for DiCon Fiberoptics, Inc. at Richmond, California
Team-Lead - Image Production (m/f/d) for Vexcel-Imaging GmbH at Graz, Austria
Upcoming Events
MEMS & Imaging Sensors Summit at World Trade Center Grenoble France - Sep 25 - 27, 2019
2019 Electronic Design Process Symposium at Milpitas CA - Oct 3 - 4, 2019
Embedded Systems Week (ESWEEK) at New York City NY - Oct 13 - 18, 2019



Internet Business Systems © 2019 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise