Andes Technology and M31 Technology Collaborated on Optimal Power Efficiency CPU Implementation for IoT SoC Market

Hsinchu, Taiwan, June 15, 2017 – Andes Technology Corporation (, the first and leading supplier of licensable 32/64-bit processor cores in Asia, and M31 Technology (, a professional silicon intellectual property (IP) provider, today jointly announced that AndesCoreTM N705 CPU had adopted M31’s low-power silicon IPs and Power Management Kit (PMK) to provide a very low power consumption CPU solution for SoC design in IoT and related low power applications. 

The AndesCore™ N705 is a 32-bit low-power small-gate-count CPU IP core, a member of AndesCore™ processor families from Andes Technology. Designed with the AndeStar™ V3m architecture and a 2-stage pipeline, N705’s dynamic power consumption is less than 60% and its power efficiency is more than two times of the same class of product on the market. It also supports features like PowerBrake and FlashFetch™ for additional power management and performance improvement.  

Under this cooperation, M31 provides further low-power IP solutions in 40nm process technology. These IPs including “Low Power Cell Library” and “Green Memory Compiler” for Andes N705 CPU at the physical implementation level: 

•Low Power Cell Library, which includes the Standard Cell Library, the unique Low Power Optimization Kit, and the Power Management Kit (PMK).
•Green Memory Compiler, with “dual-rail memory operation” to help customers with “Dynamic Voltage Frequency Scaling (DVFS); with “Power Gating Technology” to handle the “Static Leakage Power Consumption” in different operating modes. 

“AndesCore™ N705 is well suited for SoC designs on IoT, biomedical, wearable and intelligent home appliances because its architecture was specifically designed to deliver high performance at very low power consumption.” said Dr. Charlie Su, Andes Technology CTO and Senior Vice President of R&D. “With M31’s low-power IP solution and Power Management Kit, it is able to reduce static power consumption by 50% from Clock-Gating mode to State Retention mode, and to reduce additional 75% from State Retention mode to Power-gating mode”. 

“Together, the Power Management modes, the Dynamic Voltage and Frequency Scaling (DVFS), the Low Power Cell Libraries and Memories, and N705’s power efficient architecture make possible this impressive advancement for ultra-low power processor implementation,” he said. “As the requirements for the standby time and the operating time are ever-increasing in each new generation of battery-powered devices, we will continue cooperating on the low power technologies to provide comprehensive solutions for the industry.” 

Willis Shih, RD VP of M31 Technology, stated, “M31 is very glad to cooperate again with Andes Technology. M31’s low-power silicon IPs and Power Management Kit (PMK) provide a total solution for SoC design whether on dynamic power comsumption or on static power comsumption. These low power consumption features are particularly applicable for the IoT and wearable products market; helping enhancing customer competency and to satisfying the overall design requirements on IoT applications, such as low power consumption, low cost, and power management goals.” 

“In the future, M31 will continue its IP development and validation in advanced process technologies to provide distinctive silicon IP to the worldwide chip design community. These IP solutions will satisfy customer SoC design on various low voltage supply and low power consumption , in order to help customers grasp market opportunities through short design cycles, low manufacturing cost, and high product competitiveness.” 

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