Avery Design Systems Announces NVMe 1.3 and NVMe-MI Verification IP Updates

Tewksbury, MA, 3 August 2017 - Avery Design Systems Inc., an innovator in functional verification productivity solutions, today announced availability of updates to its NVMe VIP supporting NVMe 1.3 and support for new NVMe-Management Interface (NVMe-MI) over PCIe 4.0 or SMBus 3.0.

The NVMe VIP now supports the NVMe 1.3 standard including enhancements to models, protocol checking, and compliance testsuites.

NVMe 1.3 mandatory features and revisions

  • Identify Namespace return list of Namespace Identifiers
  • Get Log Page command change for Retain Asynchronous Event functionality
  • Globally Unique Updates
  • SGL Dword Simplification
  • Firmware Update Granularity
  • Namespace Optimal IO Boundary
  • Non-Operational Power State Permissive Mode
  • Data Transfer Direction for opcodes shall be valid
  • Reservations Changes
  • Operation Denied status code
  • Deallocated Value for Logical Block Data 

NVMe 1.3 optional new features

  • Device Self-Test
  • Sanitize
  • Directives
  • Boot Partitions
  • Telemetry
  • Virtualization Enhancements
  • NVMe-MI Management Enhancements
  • Host Controlled Thermal Management
  • Timestamp
  • Emulated Controller Performance Enhancement 

The NVMe host driver now supports the NVMe Management Interface (NVMe-MI) to communicate out-of-band with an NVMe NVM Subsystem Management Endpoint via PCI Express or SMBus/I2C over a simplified MCTP protocol.  NVMe-MI supports a native PCIe in-line flow or SMBus adapter for out-of-bound communication via a SMBus 3.0 host model.

  • Discover devices that are present and learn capabilities of each device
  • Store data about the host environment enabling a Management Controller to query the data later
  • Health and temperature monitoring
  • Multiple Command Slots to prevent a long latency command from blocking monitoring operations
  • Processor and operating system agnostic
  • A standard format for VPD and defined mechanisms to read/write VPD contents
  • Preserves data at rest security 

“Avery continues to demonstrate leadership in NVMe and PCIe VIP with support for the latest NVMe features,” said Chris Browy, vice president of sales/marketing at Avery. “Our customers can develop new products more confidently and quickly knowing a comprehensive SystemVerilog/UVM NVMe verification environment is available for the latest in NVMe developments targeting enterprise, client, and cloud.”

See Avery Design Systems  at Flash Memory Summit (Booth #718), August 8-10, at the Santa Clara Convention Center, Santa Clara, CA. 




Review Article Be the first to review this article
Aldec


Featured Video
Jobs
Technical Marketing Mmanager for EDA Careers at Fremont, California
Principle Engineer (Analog-Mixed-Signal Implementation) for Global Foundaries at Santa Clara, California
SerDes Applications Design Engineer for Xilinx at San Jose, California
ASIC Engineer for Amazon at seattle, Washington
Entry Level Design Verification Engineer for Cirrus Logic, Inc. at Austin, Texas
Staff SerDes Applications Design Engineer for Xilinx at San Jose, California
Upcoming Events
Si2 AI/ML Winter Workshop at United States - Jan 29, 2021
virtual DATE 2021 at France - Feb 1 - 5, 2021
SEMI Technology Unites Global Summit at United States - Feb 15 - 19, 2021
DVCon U.S. 2021 at Virtual - Mar 1 - 4, 2021
TrueCircuits:



© 2021 Internet Business Systems, Inc.
670 Aberdeen Way, Milpitas, CA 95035
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise