Four Macronix Technical Papers Selected for 2017 IEDM A Novel SGVC 3D NAND Research Further Chosen as Highlight Paper

HSINCHU, Taiwan, Nov. 29, 2017 — (PRNewswire) —  Macronix International Co., Ltd. today announces that it has four technical papers selected for presentation at 2017 IEEE International Electron Devices Meeting (IEDM) which is taking place in San Francisco, USA from December 2-6. This excellent result surpasses leading memory companies worldwide. One of these four papers that describes a novel 3D NAND structure, called single-gate vertical channel (SGVC), was further chosen as a Highlight Paper, the only one from Taiwan. This demonstrated that Macronix's advanced research results in memory technologies won international recognition again.

The Highlight Paper selected for 2017 IEDM focuses on realizing a 128Gb MLC (or 192Gb TLC) 3D NAND Flash using the SGVC architecture with only 16 layers. Such memory density is comparable to 48-layer 3D NAND using a popular gate-all-around (GAA) structure. SGVC has the important advantage of much smaller cell size and pitch scaling capability which allows very high-density memory with much fewer stacking layers. The 3D SGVC NAND makes use of arrays of vertically arranged single-gate flat-cell thin film transistors with an ultra-thin body, which aren't as sensitive to variation of critical dimensions (CD) as GAA devices, and is very suitable for read-intensive memory applications.

The other three Macronix papers chosen for 2017 IEDM include one that proposes a model to understand the operational physics of junction-free structure and Wordline (WL) interference effects in a 3D NAND. Another paper deals with ovonic threshold switching (OTS) chalcogenide material system (TeAsGeSi) that incorporates Se and an extra dopant. The resulting new selector demonstrated excellent endurance and OTS characteristics suitable for 3D stackable cross-point high-density non-volatile memory. The third one discusses retention behavior of high resistance state (HRS) of ReRAMs (resistive random access memories).

Macronix has published more than 60 papers at IEDM since 2003. In recent years, Macronix was usually among the top of Taiwan-based institutions in number of papers presented at IEDM. Every two to three years, Macronix had papers chosen for Highlight Papers. Up to now, Macronix has authored 6 IEDM Highlight Papers. Especially, in 2012 Macronix presented two Highlight Papers. This year, there are 16 Highlight Papers for IEDM, Macronix's paper is the only one from Taiwan-based companies and academic institutes. This demonstrated Macronix's leading competitiveness in global advanced memory technologies.

There are about 600 papers submitted to IEDM each year on average with about 200 selected for 10 categories through strict review for publication at the meeting. In the Memory Technology category, only 25 papers will be presented at 2017 IEDM and Macronix's number of selected papers is the highest in the category. This year, 17 selected papers on first author base are from Taiwan with 11 papers from enterprises (including Macronix's 4 papers) and 6 papers from a research institute and universities.

For Macronix's Highlight Paper, please refer to: 

Paper #19.1, "A 128Gb (MLC)/192Gb (TLC) Single-Gate Vertical Channel (SGVC) Architecture 3D NAND using only 16 Layers with Robust Read Disturb, Long-Retention and Excellent Scaling Capability" H.-T. Lue et al, Macronix

About Macronix International Co., Ltd. 
Macronix, a leading integrated device manufacturer in the Non-Volatile Memory (NVM) market, provides a full range of NOR Flash, NAND Flash, and ROM products. With its world-class R&D and manufacturing capability, Macronix continues to deliver high-quality, innovative and performance driven products to its customers in the consumer, communication, computing, automotive, networking and other market segments. 

For more information, please visit Macronix website:

View original content:

SOURCE Macronix

Michelle Chang, Deputy Director, Corporate Communication Office, Macronix International Co., Ltd., TEL: 886-3-578-6688 ext. 71233, Mobile: 886-933310870, Email: Email Contact

Review Article Be the first to review this article

Featured Video
Roberto FrazzoliEDACafe Editorial
by Roberto Frazzoli
Intel’s new CEO: comments from media and analysts
More Editorial  
Senior Application Engineer Formal Verification for EDA Careers at California or Austin, California
SerDes Applications Design Engineer for Xilinx at San Jose, California
Principle Engineer (Analog-Mixed-Signal Implementation) for Global Foundaries at Santa Clara, California
Technical Marketing Mmanager for EDA Careers at Fremont, California
Entry Level Design Verification Engineer for Cirrus Logic, Inc. at Austin, Texas
Pre-silicon Design Verification Engineer for Intel at Santa Clara, California
Upcoming Events
Si2 AI/ML Winter Workshop at United States - Jan 29, 2021
virtual DATE 2021 at France - Feb 1 - 5, 2021
SEMI Technology Unites Global Summit at United States - Feb 15 - 19, 2021
DVCon U.S. 2021 at Virtual - Mar 1 - 4, 2021

© 2021 Internet Business Systems, Inc.
670 Aberdeen Way, Milpitas, CA 95035
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise