Industry interest in vertical topic areas helps to expand program
Louisville, CO – January 30, 2018 – The 2018 Design and Verification Conference and Exhibition U.S. ( DVCon U.S.) will offer attendees an intense, information-packed conference with 39 papers, 8 tutorials, 33 posters, 4 short workshops and 2 panels to choose from over the course of the four-day program. Sponsored by Accellera Systems Initiative, DVCon U.S. will be held February 26-March 1, 2018at the DoubleTree Hotel in San Jose, California.
“I am very proud of the program we have put together for our attendees at DVCon this year,” stated Tom Fitzpatrick, DVCon U.S. 2018 Technical Program Chair. “It is the must-attend conference for design and verification engineers because it continues to grow and evolve with the needs of industry. This year we’ve added some new vertical topic areas that I think attendees will find particularly intriguing and useful. Safety critical verification is a theme that attendees will see addressed throughout the conference, and the tutorials on Thursday afternoon are focused primarily on issues surrounding automotive safety and compliance. There is also a paper that will discuss UVM-based Verification of a RISC-V Processor Core. There is something for everyone at DVCon and our team of reviewers has done an excellent job of pulling the best for the program from an outstanding group of proposals,” Fitzpatrick concluded.
Program Highlights Include:
- Two full days of tutorials: Accellera Day opens the conference on Monday, February 26 with a full morning tutorial focused on the emerging Portable Stimulus Standard and its applications, and an afternoon tutorial focused on the IEEE-compatible UVM reference implementation. Sponsored tutorials and short workshops fill the schedule on Thursday, March 1.
- The keynote, “Industry’s Next Challenge: The Petacycle Challenge,” will be delivered by Christopher Tice, vice president of Verification Continuum Solutions in the Verification Group at Synopsys. He will address how new growth segments in the industry, such as Automotive, IoT, Networking, and 5G Mobile among others, are fundamentally changing the requirements for verification. It will be on Tuesday, February 27 from 1:30-2:30pm in the Oak/Fir Ballroom.
- Two panels on Wednesday, February 28: “Help! System Coverage is a Big Data Problem!” will have a panel of industry experts discuss some of the issues surrounding system coverage and some possible solutions; “The Right Tool (or Tools) for the Toughest Verification Tasks,” is comprised of users who will discuss how decisions are made about which tools are implemented in a design verification flow.
- The Exposition with be held Monday evening and Tuesday and Wednesday afternoon. The Expo and receptions continue to provide excellent opportunities for attendees to discuss what they’ve learned throughout the day with their peers and learn from exhibitors possible solutions to address their challenges. For more information on Expo hours and a list of exhibitors, visit here.
- We encourage you to cast your vote for the Best Paper and Best Poster during the conference. The awards will be presented during the reception on Wednesday.
To get a more complete guide to the conference, Dennis Brophy, DVCon U.S. 2018 general chair, explains why DVCon is even “Bigger and Better” in his Welcome Message to attendees.
DVCon is the premier conference for discussion of the functional design and verification of electronic systems. DVCon is sponsored by Accellera Systems Initiative, an independent, not-for-profit organization dedicated to creating design and verification standards required by systems, semiconductor, intellectual property (IP) and electronic design automation (EDA) companies. In response to global interest, in addition to DVCon U.S., Accellera also sponsors events in China, Europe and India. For more information about Accellera, please visit
www.accellera.org. For more information about DVCon U.S., please visit
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