Cadence Full-Flow Digital and Signoff Tools and Verification Suite Provide Optimal Results for 7nm Arm Cortex-A76 CPU Designs

SAN JOSE, Calif. — (BUSINESS WIRE) — May 31, 2018 — Cadence Design Systems, Inc. (NASDAQ: CDNS):


  • Cadence delivers 7nm RAK for the development of premium mobile Arm-based designs
  • RAK provides an optimized RTL-to-GDS flow, enabling designers to improve PPA and speed time to market
  • Cadence Verification Suite enhances verification productivity with Arm-based designs

Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced that its full-flow digital and signoff tools and the Cadence® Verification Suite support the new Arm® Cortex®-A76 processor for laptops and smartphones. To accelerate the adoption of Arm’s latest processor, Cadence delivered a new 7nm Rapid Adoption Kit (RAK) to enable customers to improve power, performance, and area (PPA) and speed time to market. Cadence has also worked closely with Arm to ensure that the Cadence Verification Suite improves overall verification productivity for customers using the Cortex-A76.

To learn more about the Cadence full-flow digital and signoff solutions that support the Cortex-A76, please visit For more information on the Cadence Verification Suite that complements Arm-based designs using the Cortex-A76 processor, please visit A series of seminars will be held during 2018, where customers can learn how to implement Cortex-A76 processors using the Cadence tools. Seminars are being planned in the following locations:

  • Bangalore, India
  • Beijing, China
  • Shanghai, China
  • Hsinchu, Taiwan
  • Shin-Yokohama, Japan

The 7nm RAK includes comprehensive documentation to enable customers to optimize their existing Cadence digital implementation flow using the latest tool features to achieve PPA goals when creating designs using the Cortex-A76 processor. The complete Cadence RTL-to-GDS flow incorporates the following digital and signoff tools:

  • Innovus Implementation System: Statistical on-chip variation (SOCV) propagation and optimization results in improved timing closure for 7nm designs
  • Genus Synthesis Solution: Register-transfer level (RTL) synthesis supports all the latest 7nm advanced-node requirements, resulting in convergent design closure using the Innovus Implementation System
  • Conformal® Equivalence Checking: Ensures the accuracy of logic changes and engineering change orders (ECOs) during the implementation flow
  • Conformal Low Power: Enables the creation and validation of power intent in context of the design, combining low-power equivalence checking with structural and functional checks to allow full-chip verification of power-efficient designs
  • Tempus Timing Signoff Solution: Offers path-based, signoff-accurate timing analysis and 7nm physically aware ECO design optimization, providing the quickest path to tapeout
  • Voltus IC Power Integrity Solution: Static and dynamic analysis used during implementation and signoff ensures optimal power distribution design
  • Quantus Extraction Solution: Fulfills all 7nm advanced-node requirements to ensure accurate correlation to final silicon

“The launch of the Cortex-A76 processors enables new opportunities for innovation in laptops, smartphones, and more advanced compute devices with an unprecedented 35 percent leap in year-over-year performance,” said Nandan Nayampally, vice president and general manager, Client Line of Business, Arm. “Through continued engagement with Cadence, we’re providing enhanced development environments that drive differentiation for our customers as they deliver intelligent solutions.”

The Cadence Verification Suite interoperates with the Cortex-A76 processor and includes:

  • JasperGold® Formal Verification Platform: Enables IP and subsystem verification including formal proofs for Arm AMBA® protocols
  • Xcelium Parallel Logic Simulation: Provides production-proven multi-core simulation accelerating SoC development and validation of Arm-based designs
  • Palladium ® Z1 Enterprise Emulation Platform: Includes hybrid technology that is integrated with Arm Fast Models for up to 50X faster OS and software bring-up and up to 10X faster software-based testing in addition to Dynamic Power Analysis technology for low power
  • Verification IP Portfolio: Enables IP and SoC verification including Arm AMBA interconnect, supporting Xcelium simulation, the JasperGold platform, and the Palladium Z1 platform

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