SANTA CLARA, Calif. — (BUSINESS WIRE) — June 20, 2018 — Silvaco Inc, a global leader providing software, IP and services for designing chips and electronic systems for semiconductor, system and display companies, will showcase its suite of machine learning enabled smart silicon solutions at the Design Automation Conference (DAC) 2018 in San Francisco, Calif.
Jun 24, 2018 - Jun 27, 2018
Exhibit Hours: 10:00 AM - 6:00 PM
747 Howard Street, 5th Floor
at the corner of Third & Howard streets
San Francisco, CA 94103
DESIGNED TO AMAZE:
Machine learning makes all the difference. Stop by the Silvaco booth to learn more about our latest innovations. VarManTM is a Variation Aware design verification tool that enables chip designers to achieve high sigma for analog blocks, standard cells libraries and memories. Using neural network algorithms, TechModelerTM creates highly accurate behavioral Verilog-A spice models with a remarkably small number of input samples. CelloTM is automating standard cell library creation, migration and optimization, exploiting dimensionality reduction algorithms applied to the SPICE model’s variation parameters, to optimize statistical characterization runtime.
Silvaco technology experts will be available to discuss and demo our broad portfolio of smart silicon solutions with emphasis on new products and capabilities serving advanced process nodes.
- Victory ProcessTM, Victory DeviceTM enabling 2D and 3D TCAD process and device simulation for CMOS, power devices and automotive applications
- SmartSpiceTM for advance node circuit simulation
- ExpertTM for schematic driven layout especially for FPD applications
- JivaroTM & BelledonneTM for extracted netlist optimization and analysis and SPICE simulation acceleration
- New solution for full memory variation analysis enabling Spice simulation, effective fail detection and accurate yield estimation from VarManTM
- More than 100 production-proven IP cores, including I3C, CAN-FD, and ARM-based subsystems
- Enterprise grade XenaTM IP management with IP fingerprinting features for supporting IP compliance
- Standard cell library creation and characterization tools for advanced FinFET nodes
Silvaco will be co-hosting the Stars of IP party, a premier semiconductor IP social event, on Tuesday, June 26, 2018 at Press Club 20 Yerba Buena Lane, San Francisco, CA 94103. Stars of IP is a private, invitation-only event. We encourage interested parties to visit us on the DAC exhibit floor to connect and inquire about a ticket.
About Silvaco, Inc.
Silvaco, Inc. is a leading EDA and IP provider of software tools used for process and device development and for analog/mixed-signal, power IC and memory design. Silvaco delivers smart silicon solutions for vertical markets including: displays, power electronics, optical devices, radiation and soft error reliability and advanced CMOS process and IP development. For over 30 years, Silvaco has enabled its customers to bring superior products to market at reduced cost and in the shortest possible time. The company is headquartered in Santa Clara, California and has a global presence with offices located in North America, Europe, Japan and Asia.
Thomas F. Blaesi, 408-567-1000
Fax (408) 496-6080