Sagantec SiFix Automates Physical Design Correction and Optimization

New Tool Accurately Implements Complex Design Rules Needed for Deep Submicron Process Technologies

FREMONT, Calif.--(BUSINESS WIRE)--Jan. 28, 2002--Sagantec today introduced SiFix(TM), a software tool used for automatic correction and optimization of physical designs. SiFix speeds physical designs that use highly complex and evolving design rules associated with advanced process technologies of 0.13 um and below. SiFix addresses the gap that the latest process technologies have created between current design practices and the functionality, manufacturability and reliability of the resulting silicon.

"As companies move to leading-edge process technologies, they find that traditional approaches to physical design lead to increasing layout effort and delays resulting in more errors and decreasing manufacturing yield," said Hein van der Wildt, Sagantec president and CEO. "With SiFix, layout designers can focus on creating the most effective physical layouts and rely on SiFix to handle the growing complexity of design rules and help speed physical-design implementation with improved manufacturability."

SiFix is currently being used successfully at several customer sites. Recent application successes include post-routing design-rule check (DRC) cleanup on a processor design, last moment process changes for DRAM control logic, reliability improvement on a high performance microprocessor design, and flash memory full-chip yield enhancement.

Need for SiFix

In deploying advanced process technologies, semiconductor fabrication plants (fabs) release new design rules needed to ensure reliable manufacture of semiconductor devices. As their processes matures, these fabs will release updated or preferred rule sets that specify which rules should be "relaxed" when possible to reduce defect and performance yield loss. In turn, designs that have been implemented with an earlier release of the design rules will experience many new DRC errors.

As a result, designers face a growing gap between the capabilities of their physical layout design tools and design-rule requirements associated with preferred rule sets or late stage design rule changes. For companies attempting to use advanced process technologies, dealing with this gap between physical-design capabilities and requirements impose an additional burden on physical designers already caught between increasing design complexity and shorter design tape-out deadlines.

SiFix approach

By automating correction and optimization of physical designs, SiFix addresses the need for a more sophisticated layout design tool able to cope with the demands of advanced process technologies. SiFix relieves designers from the burden of dealing with design rule complexity and implementation of preferred rules for making physical designs correct for manufacture. With SiFix, physical designers can implement layouts using simple rules and rely on SiFix to handle the additional complex rules. With this approach, designers can also begin physical implementation even before final design rule values are fully available from the fab.

SiFix scans through layout files, using quality and reliability rules to adjust width, spacing and increase strapping in selected nets and segments. When it finds errors and hazards, SiFix fixes them locally, leaving the rest of the physical design untouched. SiFix can correct an entire design in a matter of hours and works equally well on full-custom layout or cell-based designs.

SiFix is based on the same technology that powers SiClone(TM). Released last year, SiClone provides an automated solution for re-implementation, process migration and design closure of custom physical designs.

Pricing and Availability

SiFix is available now under time-based licensing starting at $225,000 a year. SiFix is available on Solaris, HP-UX and Linux platforms.

About Sagantec

Sagantec provides software, methodologies and services that enable rapid physical implementation, reuse, design closure and manufacturability for full custom physical designs in sub-wavelength technologies. The company is working closely with its semiconductor partners and customers to ensure that its products work with the most aggressive technologies of 0.13 micron and below. Sagantec products are specifically designed to accelerate the physical design process of high performance/low power CPUs, and DSPs, dedicated and embedded memories, and analog/mixed-signal circuits. Privately held and funded, Sagantec was founded in 1993 in Israel. Its corporate headquarters is located at 46485 Landing Parkway, Fremont, CA. 94538. Telephone: 510/360-5200. Facsimile: 510/360-5255. On the web at: http://www.sagantec.com.

Note to Editors: Sagantec acknowledges trademarks or registered trademarks of other organizations for their respective products and services.


Contact:
     Sagantec North America
     Coby Zelnik, 510/360-5200 x110
     
Email Contact
     
http://www.sagantec.com
        or
     Lee Public Relations
     Pam Wasserman, 650/363-0142
     
Email Contact



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