Silicon Creations Highlights PLL Developments in 22nm, 12nm, 7nm, and 5nm at TSMC OIP™ Ecosystem Forum

Variety of PLLs supported in multiple TSMC process nodes 

LAWRENCEVILLE, GA –– October 1, 2018 ––  Silicon Creations, a leading supplier of high-performance analog and mixed-signal intellectual property (IP), announced a wide variety of IP offerings in TSMC’s 5FF, 7FF, 7FF+, 12FFC, and 22ULP/ULL process nodes, designed to support customer’s SoC timing demands. 

Silicon Creations will showcase its technologies in these and other nodes at  TSMC’s OIP Ecosystem Forum in Santa Clara, Calif., October 3, 2018. TSMC, the world’s leading foundry, and Silicon Creations have enjoyed a decade-long successful collaboration that includes several milestones, the latest being the shipment of the 1,000,000th 16nm wafer containing Silicon Creations’ Fractional-N PLL. 

“Our collaboration with TSMC as an IP Alliance member continues to enable us to provide our customers with a broad array of leading-edge IP on TSMC’s proven technology nodes,” said Andrew Cole, vice president, Silicon Creations. 

At the OIP Ecosystem Forum, Silicon Creations will showcase a range of phase-locked loops (PLLs) shipping in products in TSMC’s most advanced process nodes. These include general-purpose Fractional-N PLLs, IoT PLLs with 32kHz RTC reference clock, Low-area Core voltage PLLs and Deskew PLLs for DDR interfaces. 

“This same group of PLLs will be taping out shortly on a TSMC 7nm FF+ test chip,” Cole said.

“A wide range of PLL designs have already ramped to production in 12FFC and 7FF.  Additionally, Silicon Creations’ general-purpose Fractional-N synthesizer and IoT PLL with 32kHz RTC reference clock have been delivered to customers in 22nm ULP/ULL and will tape out shortly.” 

Of note at OIP will be 16FFC, and 7nm Automotive Design Enablement Platform support.  “We continue to broaden our support for use of our IPs in safety critical applications and have provided ISO26262-compliant documentation packages for PLLs in 16FFC and 7FF,” Cole said. “We look forward to talking to OIP attendees about how to support their safety-critical chips.” 

As a TSMC IP Alliance member, Silicon Creations’ extensive portfolio of PLL and high-speed I/O IPs has been qualified through the TSMC IP9000 program for several processes ranging from 180nm to 7nm. 

“Silicon Creations’ PLLs are used in almost every market vertical and are an excellent choice for smart phones, battery-operated products, networking chips, energy-efficient and IoT chips, portable audio, set-top boxes, flat panel displays, high-performance computing, mass storage, and many others,” Cole said. 

TSMC OIP attendees can discuss their design projects and IP needs with Silicon Creations representatives at booth #416 on the exhibition floor of the Santa Clara Convention Center in Santa Clara, Calif., on October 3, 2018. 

About Silicon Creations

Silicon Creations provides world-class silicon intellectual property (IP) for precision and general-purpose timing (PLLs), chip-to-chip SerDes and high-speed differential I/Os. Silicon Creations’ IP is proven from 7nm to 180nm process technologies. With commitment to customer success, its IP has an excellent record of first silicon to mass production in customer designs. Silicon Creations, founded in 2006, is self-funded and growing. The company has development centers in Atlanta, Ga., and Krakow, Poland, and worldwide sales representation. For more information, visit

Review Article Be the first to review this article
Featured Video
More Editorial  
Latest Blog Posts
Bob Smith, Executive DirectorBridging the Frontier
by Bob Smith, Executive Director
ESD Alliance/Accellera Panel Takes Executive View on Returning to the Office
Anupam BakshiAgnisys Automation Review
by Anupam Bakshi
Automating Your Documentation Flow
Vincent ThibautArteris IP Blog
by Vincent Thibaut
Arteris IP Extends IP-XACT to UVM Testbenches
Circuit Design & Layout Simulation Engineer - Co-Op (Spring 2021) for Global Foundaries at Santa Clara, California
Business Operations Planner for Global Foundaries at Santa Clara, California
Senior HID Sensor Algorithm Architect for Apple Inc at Cupertino, California
Senior Staff Field Application Engineer for Global Foundaries at Santa Clara, California
Staff SerDes Applications Design Engineer for Xilinx at San Jose, California
Principle Engineer (Analog-Mixed-Signal Implementation) for Global Foundaries at Santa Clara, California
Upcoming Events
DesignCon 2021 at San Jose McEnery Convention Center San Jose, CA San Jose CA - Aug 16 - 18, 2021
SEMICON Southeast Asia 2021 Hybrid Event at Setia SPICE Convention Centre Penang Malaysia - Aug 23 - 27, 2021
SEMI Europe Summit at Online, Central European Time Germany Germany - Sep 1 - 3, 2021
7th International Conference on Sensors & Electronic Instrumentation Advances (SEIA' 2021) at Palma de Mallorca, Mallorca balearic islands) Spain - Sep 14 - 16, 2021

© 2021 Internet Business Systems, Inc.
670 Aberdeen Way, Milpitas, CA 95035
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise