LOUISVILLE, Colo., Dec. 11, 2018 (GLOBE NEWSWIRE) -- The 2019 Design and Verification Conference and Exhibition (
DVCon) U.S. Advance Program is now available online and registration is open. DVCon U.S., sponsored by
Accellera Systems Initiative, will be held February 25 – 28, 2019 at the DoubleTree Hotel in San Jose, California.
“With a record number of submissions for the 2019 conference, DVCon U.S. offers its attendees a broad selection of papers, posters, panels, tutorials and short workshops to choose from,” stated Aparna Dey, DVCon U.S. 2019 General Chair. “As electronic designs and verification complexities and challenges continue to grow at a rapid pace, it is critical that design and verification engineers have a resource for the latest information that will be beneficial in their current and upcoming projects. Now in its 31st year, DVCon continues to be the must-attend conference for the latest information on challenges and solutions as well as a gathering place where colleagues can share and discuss information with peers.”
The conference begins on Monday, February 25 with Accellera Day. A morning tutorial titled, “Gain Valuable Insight into the Changes and Features that Are Part of the New IEEE 1800.2 Standard for UVM and How to Make the Most of Them,” will be presented by Cliff Cummings and will offer attendees tips and tricks on the Accellera Universal Verification Methodology (UVM) standard. There will also be a short workshop in the afternoon, “Functional Coverage for SystemC” as well as five sponsored short workshops to choose from. Accellera will also provide a luncheon on Monday that will include the presentation of Accellera’s annual Technical Excellence Award. The DVCon Expo and reception will follow the afternoon short workshops and will begin at 5:00pm.
Fram Akiki, Vice President, Electronics & Semiconductor Industry for Siemens PLM Software, will provide this year’s keynote address, “Thriving in the Age of Digitalization,” on Tuesday, from 1:30pm-2:30pm in the Oak/Fir Ballroom. Mr. Akiki will discuss why it’s important to have an integrated digitalization strategy to succeed in today’s semiconductor market.
There will be two panel sessions on Wednesday, February 27: “Verification and Compliance in the Era of Open ISA—Is the Industry Ready to Address the Coming Tsunami of Innovation?” at 8:30am and “Deep Learning—Reshaping the Industry or Holding to the Status Quo?” at 1:30pm.
Attendees can choose from a broad selection of 39 papers, four tutorials, approximately 25 posters and eight short workshops over the course of the four-day technical conference and exhibition.
To give attendees plenty of opportunities to meet with peers and experts in the design and verification community, the Expo will be held Monday from 5:00pm to 7:00pm and Tuesday and Wednesday from 2:30pm to 6:00pm.
For the complete DVCon U.S. 2019 schedule, including a list of tutorials, short workshops, panels, sponsored luncheons and events, visit
https://dvcon.org/agenda. To view the videos from the DVCon U.S. 2018 Accellera Day tutorials, visit
Advance registration rates are available through January 28, 2019. Visit https://dvcon.org/rates for further information.
DVCon is the premier conference for discussion of the functional design and verification of electronic systems. DVCon is sponsored by Accellera Systems Initiative, an independent, not-for-profit organization dedicated to creating design and verification standards required by systems, semiconductor, intellectual property (IP) and electronic design automation (EDA) companies. In response to global interest, in addition to DVCon U.S., Accellera also sponsors events in China, Europe and India. For more information about Accellera, please visit www.accellera.org. For more information about DVCon U.S., please visit www.dvcon.org. Follow DVCon on Facebook https://www.facebook.com/DvCon or @dvcon_us on Twitter or to comment, please use #dvcon_us.