Expert panel will provide an update on the multiple interfaces being deï¬ned by OIF including CEI-112G MCM, XSR, VSR, MR and LR for 112G
Fremont, Calif.—January 23, 2019 – A panel ofexperts will present and discuss the ongoing, multi-faceted Common Electrical I/O (CEI)-112G interface effort at this year’s being held in Santa Clara, CA January 29-31. “ ,” is scheduled for Thursday, January 31 at 3:45 pm (local) and will provide an update on the multiple interfaces being deï¬ned by OIF including CEI-112G MCM, XSR, VSR, MR and LR. Applications of these 112 Gb/s interfaces include die-to-die, chip-to-module, chip-to-chip and long reach over backplane and cables.
Panel speakers include Brian Holden of Kandou Bus and OIF member; Cathy Liu of Broadcom Inc. and OIF Board Member; Steve Sekel of Keysight Technologies and OIF PLL Interoperability Working Group Chair and Nathan Tracy of TE Connectivity and OIF President.
Since 2000, OIF has deï¬ned Interoperability Agreements (IA)s for electrical interconnects known as CEI. CEI is a clause-based document that defines implementation details for interoperable electrical channels initially issued for 6 Gbps, then 11, 28, and 56 and includes definitions for multiple channel implementation topologies and will soon include 112 Gbps clauses. In August of 2016, OIF announced thein an overall effort that has now expanded to ï¬ve projects.
“Previous CEI development has been highly inï¬uential and has been adopted, influenced or adapted by many other high-speed interconnect speciï¬cations throughout the industry,” said Tracy. “Given that the CEI-112G generation of high-speed transmitters, receivers and channels will be challenging to deï¬ne, implement and measure, this panel will provide guidance to where the industry is headed and what the key challenge points are likely to be.”
The CEI-112G IA effort is challenging in signal integrity, implementation complexity and measurement terms. The signals are increasingly vulnerable to channel discontinuities, leading to signal impairment and crosstalk. The switching speed and the density of the available SerDes transistors have not kept pace with other silicon functions, resulting in architectural challenges. Finally, the ability to probe and repeatably capture measurements at these rates with sufï¬cient accuracy and precision is challenging.
Check the status of OIF’s current work in CEI-112G.
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