GOWIN Adopts HyperBus™ for built-in PSRAM and HyperRAM™ Interfacing

SAN JOSE, Calif. and GUANGZHOU, China, April 30, 2019 (GLOBE NEWSWIRE) -- GOWIN Semiconductor Corporation, the world’s fastest-growing programmable logic company, announces HyperBus™ interface specification support for their FPGA and programmable SoC products.  The HyperBus interface is used to support external low pin count memories and the PSRAM provided internally within GOWIN programmable devices.

HyperBus memory provides both high-speed interfacing and low pin count, making it ideal for GOWIN’s edge focused FPGA product lines.  GOWIN devices have up to 64-Mbits of PSRAM with 8-16 bit configurable DDR bus widths directly accessible using GOWIN’s HyperBus Memory Interface IP Core.  Additional external HyperRAM™ and HyperFlash™ memory devices can be connected.  The HyperBus interface consumes only 11 pins and additional memories can be multiplexed using an additional chip select.

GOWIN’s uSoC FPGA’s also provide interfacing support between internal processors, PSRAM, and external HyperRAM, making it ideal for consumer and industrial IoT applications.  Devices such as GOWIN’s LittleBee GW1NSR-2C combine an Arm Cortex M3 microprocessor, FPGA, and a PSRAM in a single device.  The PSRAM is connected to the processor with a HyperBus interface providing 4MB of additional memory internally.  External memories can additionally be added if desired.

“Low pin count memory is essential for the future of embedded semiconductor applications.  While advances in semiconductor technology continually increase the logic gate count in today’s devices, I/O count generally remains constant,” said Grant Jennings, Director of International Marketing for GOWIN Semiconductor,  “As a result, more computing and data traffic have to be transferred over the same number of pins.  GOWIN’s support for HyperBus memory provides efficient usage of its package pins resulting in lower power, cost, and PCB footprint offering compared to solutions using legacy memory alternatives.”

Using HyperBus memory in FPGA applications provides embedded developers with the opportunity to create unique solutions.  Capturing camera or microphone data as well as intermediate layer storage in the HyperBus memory is ideal for Artificial Intelligence and Machine Learning applications.  The memory can also be used as a frame buffer for displays, retaining the last video frame while a system goes to sleep or is rendering new graphics.  The FPGA can also be used to bridge between other processor interfaces such as QSPI or traditional parallel SRAM, where there may be optimization in PCB footprint, layout, or cost.

GOWIN’s HyperBus Memory Interface and PSRAM featured devices are in production now.  Integrated PSRAM is available in both Flash and SRAM product families with package form factors as small as 4.5mm x 4.5mm and FPGA resources from 2K-20K LUTs. 

About GOWIN Semiconductor Corp.

Founded in 2014, GOWIN Semiconductor Corp., headquartered with major R&D in China, has the vision to accelerate customer innovation worldwide with our programmable solutions. We focus on optimizing our products and removing barriers for customers to use programmable logic devices. Our commitment to innovative features, technology, and quality enables customers to reduce the total cost of ownership by using our FPGA’s on their production boards. Our offerings include a broad portfolio of programmable logic devices, design software, intellectual property (IP) cores, reference designs, and development kits. We strive to serve customers in the consumer, industrial, communication, medical, and automotive markets worldwide.

 For more information about GOWIN, please visit  www.gowinsemi.com

Copyright 2019 GOWIN Semiconductor Corp. GOWIN, LittleBee®, GW1N/NR/NS/1NSR/1NZ®, Arora®, GW2A/AR®, GOWIN EDA and other designated brands included herein are trademarks of GOWIN Semiconductor Corp. in China and other countries. All other trademarks are the property of their respective owners.

Media Contact:

Scott Casper

GOWIN Semiconductor



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