Synopsys Achieves More Than 250 Design Wins with DesignWare IP on TSMC 7nm FinFET Process

MOUNTAIN VIEW, Calif., May 6, 2019 — (PRNewswire) —


  • Silicon-proven DesignWare PHY IP on TSMC's 7nm FinFET process includes USB, DDR, LPDDR, HBM, PCI Express, MIPI, DisplayPort, and Ethernet
  • Successful customer tapeouts of DesignWare Logic Libraries and Embedded Memories on 7nm demonstrate high quality and reduce integration risk
  • Portfolio of DesignWare IP on TSMC's 7nm process enables leading semiconductor companies to achieve silicon success across mobile, cloud computing, and automotive applications

Synopsys, Inc. (Nasdaq:  SNPS) today announced that its DesignWare® Logic Library, Embedded Memory, Interface and Analog IP on TSMC's 7-nanometer (nm) process technology has achieved more than 250 design wins. Close to 30 leading semiconductor companies have selected Synopsys' 7nm DesignWare IP portfolio to deliver their high-performance, low-power system-on-chips (SoCs) for a range of applications including mobile, cloud computing, and automotive. By achieving broad adoption of its DesignWare IP with multiple customer silicon successes, Synopsys enables designers to integrate the IP with confidence and significantly lower SoC integration risk.

"TSMC's close collaboration with Synopsys through many process generations underscores our mutual commitment to providing designers with IP that helps them solve critical design challenges and quickly ramp to volume production," said Suk Lee, senior director, Design Infrastructure Management Division at TSMC. "As an experienced ecosystem partner of TSMC, Synopsys continues to be in the forefront of providing IP solutions that address the performance, power, and area requirements of SoCs implemented on TSMC's industry-leading 7-nanometer process targeting AI, automotive, and cloud applications."

"To meet today's demands of AI workloads, video streaming, and other data-intensive operations in the cloud and on the edge, designers are relying on Synopsys for proven IP solutions in the most advanced, high-performance FinFET processes," said John Koeter, vice president of marketing for IP at Synopsys. "The silicon-proven DesignWare IP on TSMC's 7-nanometer process has been extensively validated through broad customer adoption and enables designers to quickly deliver differentiated products with less risk for faster time-to-market."

Availability and Resources

The DesignWare IP portfolio on TSMC 7nm and 7nm Plus processes are available now.

About DesignWare IP

Synopsys is a leading provider of high-quality, silicon-proven IP solutions for SoC designs. The broad DesignWare IP portfolio includes logic libraries, embedded memories, embedded test, analog IP, wired and wireless interface IP, security IP, embedded processors and subsystems. To accelerate prototyping, software development and integration of IP into SoCs, Synopsys' IP Accelerated initiative offers IP prototyping kits, IP software development kits and IP subsystems. Synopsys' extensive investment in IP quality, comprehensive technical support and robust IP development methodology enable designers to reduce integration risk and accelerate time-to-market. For more information on DesignWare IP, visit

About Synopsys

Synopsys, Inc. (Nasdaq: SNPS) is the Silicon to Software partner for innovative companies developing the electronic products and software applications we rely on every day. As the world's 15th largest software company, Synopsys has a long history of being a global leader in electronic design automation (EDA) and semiconductor IP and is also growing its leadership in software security and quality solutions. Whether you're a system-on-chip (SoC) designer creating advanced semiconductors, or a software developer writing applications that require the highest security and quality, Synopsys has the solutions needed to deliver innovative, high-quality, secure products. Learn more at

Editorial Contacts:

Camille Xu

Norma Sengstock

Synopsys, Inc

Synopsys, Inc  

SOURCE Synopsys, Inc.

Company Name: Synopsys, Inc.
Financial data for Synopsys, Inc.

Review Article Be the first to review this article
DAC 2020

 True Circuits: Ultra PLL

Featured Video
Latest Blog Posts
Modesto (Mo) CasasGlobal Business in EDA
by Modesto (Mo) Casas
The Contingent Purchase Order Reassures Buyer and Seller
Bob Smith, Executive DirectorBridging the Frontier
by Bob Smith, Executive Director
Meet the New Cylynt, Fighting Software Piracy Around the Globe
Anupam BakshiAgnisys Automation Review
by Anupam Bakshi
Smart Assembly of SoC Designs
Senior Physical Design/Layout Engineer for EDA Careers at EAST COAST, California
Digital Design ASIC Manager for EDA Careers at RTP, North Carolina
Senior Analog Design Engineers #5337 for EDA Careers at EAST COAST, California
Senior Application Engineer Formal Verification for EDA Careers at San Jose and Austin, California
Upcoming Events
57th Design Automation Conference 2020 at San Francisco CA - Jul 19 - 23, 2020
SEMICON West 2020 - Virtual Event at - Jul 20 - 23, 2020
Semicon Southeast Asia 2020 at MITEC Kuala Lumpur Malaysia - Aug 11 - 13, 2020
Drive World Conference & Expo at Santa Clara Convention Center Santa Clara CA - Aug 11 - 13, 2020
DownStream: Solutions for Post Processing PCB Designs
Verific: SystemVerilog & VHDL Parsers

© 2020 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise