eSilicon Tapes Out 7nm neuASIC IP Platform Test Chip

SAN JOSE, Calif., May 07, 2019 (GLOBE NEWSWIRE) -- eSilicon, a leading provider of FinFET ASICs, market-specific IP platforms and advanced 2.5D packaging solutions, announced today the tapeout of a 7nm test chip to validate the latest neuASIC™ IP platform release. eSilicon’s neuASIC IP platform provides a library of IP that supports a wide range of functions found in artificial intelligence applications. The IP is verified to be compatible and supports algorithm-specific customization as well as a validated integration architecture through eSilicon’s ASIC Chassis.

IP on the test chip includes specialized memory and compute blocks to support near-memory compute applications. These include specialized low power memory for interfacing with multiply-accumulate functions (MACs) as well as large embedded SRAMs supporting multiple ports. The large (GIGA) memory supports WAZPS (word all zero power saving) and various sleep modes for standby power reduction. The compute blocks include several MAC blocks, low power standard cells, transpose memory functions and a convolutional neural network engine. Low-power data movement IP (cross-bar) are also included as well as IP for support functions such as GPIO, PLL and BIST.

“Our neuASIC IP platform has received a very strong reception,” said, Patrick Soheili, vice president, business and corporate development at eSilicon. “Some of the largest consumers of AI technology in the world, as well as many high-profile AI startups have engaged with us to dig deeper into our neuASIC IP platform. This new test chip will provide silicon data to support that process.”

You can learn more about eSilicon’s neuASIC IP platform here, or contact your eSilicon sales representative directly or via sales@esilicon.com.

About e Silicon
eSilicon provides complex FinFET ASICs, market-specific IP platforms and advanced 2.5D packaging solutions. Our ASIC-proven, differentiating IP includes highly configurable 7nm 56G/112G SerDes plus networking-optimized 16/14/7nm FinFET IP platforms featuring HBM2 PHY, TCAM, specialized memory compilers and I/O libraries. Our neuASIC™ platform provides AI-specific IP and a modular design methodology to create adaptable, highly efficient AI ASICs. eSilicon serves the high-bandwidth networking, high-performance computing, AI and 5G infrastructure markets. www.esilicon.com

Collaborate. Differentiate. Win.™

eSilicon is a registered trademark, and the eSilicon logo, neuASIC and “Collaborate. Differentiate. Win.” are trademarks, of eSilicon Corporation. Other trademarks are the property of their respective owners.

Contacts:  
Sally SlemonsNanette Collins
eSilicon CorporationPublic Relations for eSilicon
Email Contact Email Contact

eSilicon.jpg




Review Article Be the first to review this article
Featured Video
Editorial
More Editorial  
Latest Blog Posts
Bob Smith, Executive DirectorBridging the Frontier
by Bob Smith, Executive Director
Trends in the Semiconductor Design Ecosystem
Vincent ThibautArteris IP Blog
by Vincent Thibaut
Arteris IP Extends IP-XACT to UVM Testbenches
Anupam BakshiAgnisys Automation Review
by Anupam Bakshi
Specification Automation for Designers
Jobs
Technical Product Manager- SISW-EDA 238452 for Siemens AG at Fremont, California
Senior Staff Field Application Engineer for Global Foundaries at Santa Clara, California
Logic Design Engineer for Intel at Santa Clara, California
Staff SerDes Applications Design Engineer for Xilinx at San Jose, California
Circuit Design & Layout Simulation Engineer - Co-Op (Spring 2021) for Global Foundaries at Santa Clara, California
Pre-silicon Design Verification Engineer for Intel at Santa Clara, California
Upcoming Events
DesignCon 2021 at San Jose McEnery Convention Center San Jose, CA San Jose CA - Aug 16 - 18, 2021
SEMICON Southeast Asia 2021 Hybrid Event at Setia SPICE Convention Centre Penang Malaysia - Aug 23 - 27, 2021
SEMI Europe Summit at Online, Central European Time Germany Germany - Sep 1 - 3, 2021
7th International Conference on Sensors & Electronic Instrumentation Advances (SEIA' 2021) at Palma de Mallorca, Mallorca balearic islands) Spain - Sep 14 - 16, 2021



© 2021 Internet Business Systems, Inc.
670 Aberdeen Way, Milpitas, CA 95035
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise