Five Outstanding Innovators Under Age 40 Honored at the 56th Design Automation Conference

Engineers from industry giants to academia recognized for contributions to EDA

LOUISVILLE, Colo. — (BUSINESS WIRE) — May 16, 2019 — For 56 years, the future of innovation for the design and automation of electronic systems and circuits has been found at the Design Automation Conference (DAC). This year is no different, DAC and its sponsors are pleased to announce the five winners of the Under-40 Innovators Award, sponsored by Association for Computing Machinery (ACM) and the Institute of Electrical and Electronics Engineers (IEEE). The award recognizes five top young innovators, who have made a significant impact in the field of design and automation of electronics.

The winners will be honored before the keynote address on Monday, June 3rd at 56th DAC being held June 2-6, 2019 at the Las Vegas Convention Center, Las Vegas, NV. The honorees will also participate on a panel to discuss Quantum Computing, AI and IOT. The panel discussion will held at DAC on Monday, June 3 at 3:00 p.m., moderated by EE Times Editor, Junko Yoshida in the DAC Pavilion.

Registration for DAC is open now. Deadline to register for the complimentary I LOVE DAC exhibit pass is Friday, May 17th. The I LOVE DAC pass allows free access to the DAC exhibits, award ceremonies, five Keynote sessions, the DAC Pavilion sponsored by Cadence, and the Design on Cloud Pavilion sponsored by Google, with daily presentations along with networking receptions each evening.

The 2019 Under 40 Innovation honorees are:

Yunji Chen, Full professor, Institute of Computing Technology, Chinese Academy of Sciences

Yunji Chen graduated from Special Class for Gifted Young, University of Science and Technology of China in 2002, and got his Ph.D. degree from Institute of Computing Technology (ICT), Chinese Academy of Sciences in 2007, both in computer science. Currently, he is a full professor at ICT. He leads the Intelligent Processor Research Center of ICT to develop the Cambricon deep learning processors. Yunji Chen has co-written one book and more than 100 papers presented at various engineering conferences. He served as the general co-chair of ASPLOS'17, and as a member of the technical program committee for DAC, ISCA, HPCA, MICRO, and ASPLOS. Chen has been listed in MIT Global TR-35 (2015) for his contribution in deep learning processors and has been reported as "leader" and "pioneer" of deep learning processor by Science magazine.

Huichu Liu, Staff Research Scientist, Intel Corporation

Huichu Liu received the B.S. degree in microelectronics from Peking University, Beijing in 2009 and the Ph.D. degree in electrical engineering from the Pennsylvania State University in 2014. While earning her doctorate, she won an IBM Ph.D. Fellowship Award. Huichu interned at IBM’s T. J. Watson Research Center, from May-August 2011, and at GlobalFoundries from June -August 2014, respectively. In 2015, Huichu joined Intel Labs as a research scientist for process-optimized microarchitecture design, where she has made multiple innovations and technology transfers for driving energy efficiency breakthroughs in circuits and CPU architecture with novel devices. She is currently a staff research scientist at the Artificial Intelligence Product Group, Intel Movidius. Her research interests include device-circuit co-design of beyond-CMOS logic technologies and emerging non-volatile memories for energy efficient applications and agile hardware design exploration of advanced architectures for machine learning accelerators. Huichu has contributed to 49 publications and holds nine US patents.

Rasit Onur Topaloglu, Senior Hardware Developer & Program Manager, IBM Corp.

Rasit Onur Topaloglu obtained his B.S. in electrical and electronic engineering from Bogazici University, M.S. in computer science, and Ph.D. in computer engineering from University of California, San Diego. He has worked for companies such as Qualcomm, AMD, GlobalFoundries and is currently with IBM. As a senior hardware developer, he focuses on design for manufacturability and design-technology co-optimization. Additionally, he is a program manager responsible for 7nm technology and Power10 microprocessors. He has over 60 peer-reviewed publications and 30 U.S. patents. He serves on the IBM Internet of Things patent review board. His latest book, “ Beyond-CMOS Technologies for Next Generation Computer Design,” is out now. He has organized seven DAC workshops in previous years, including one – on machine learning – that had more than 100 registrations. He serves as vice chair and professional activities chair of the IEEE Mid-Hudson chapter and secretary of ACM Poughkeepsie. His latest talks include “Compact Qubits for Quantum Computing” and “ACM Code of Ethics and Implications on Artificial Intelligence.”

Robert Wille, Professor, Johannes Kepler University Linz, Austria

Robert Wille, a professor at the Johannes Kepler University Linz, Austria, was appointed at the age of 32 as one of the industry’s youngest full professors. From 2002 to 2006, he studied computer science at the University of Bremen. After completing his doctorate in 2009 summa cum laude, he did post-doctoral work at the University of Bremen and, since 2013, has served as senior researcher in the cyber-physical systems department of the German Research Center for Artificial Intelligence (DFKI). He’s an expert in developing methods for design automation, which he not only applies to the design of conventional circuits and systems, but also to future technologies (including quantum computing, reversible circuits, microfluidic biochips, etc.) as well as complementary fields such as particle-based simulation. He is an interdisciplinary researcher who frequently crosses the boundaries between computer science, electrical engineering, quantum physics, medicine, or even legal sciences. The methods he’s developed have created lasting impacts for companies such as Infineon, IBM, or AMD as well as businesses with markets in domains different from the established EDA companies. He has published more than 200 journal and conference papers, which have been presented at various conferences including DAC, DATE, ICCAD, ASP-DAC, MoDELS and TCAD. His honors include a Google Research Award in 2018 as well as best paper awards at the International Conference on Computer-Aided Design in 2013 and the Forum on Specification and Design Languages in 2010.

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