Cadence Launches Protium X1, the First Scalable, Data Center-Optimized Enterprise Prototyping System for Early Software Development

Highlights:

  • Scales to multi-MHz performance for billion gate designs, up to 64X capacity over Protium S1, and introduces advanced debug capabilities that enable early software development AI, mobile, graphics and 5G SoCs
  • Includes a unified front-end with the Palladium Z1 Enterprise Emulation Platform for ease of adoption and fast bring-up
  • Offers the benefits of the existing Protium platform product family with the scalability of the data center
  • Innovative multi-user capabilities provide optimal utilization of the installed system at single-FPGA granularity for storage, automotive, image, consumer and medical applications

SAN JOSE, Calif. — (BUSINESS WIRE) — May 28, 2019 — Cadence Design Systems, Inc. (NASDAQ: CDNS) today expanded its Verification Suite and System Innovation offerings with the announcement of the Cadence® Protium X1 Enterprise Prototyping Platform, the first data center-optimized FPGA-based prototyping system providing multi-MHz speed for early software development, hardware/software regressions and full system validation. The Protium X1 architecture is applicable to a wide range of design sizes and applications, from multi-billion-gate AI and 5G chips to single-FPGA IoT chips and IP blocks. Using the Protium X1 platform, customers can experience up to 80% faster bring-up, while also benefitting from scalable capacity of up to 32 racks, offering up to 24X more capacity than competing desktop prototyping systems. The platform also scales to multi-MHz performance for billion gate designs, overcoming the architecture limitations of traditional systems that drop in performance for designs above 400 million gates.

For more information on the new Protium X1 platform, please visit www.cadence.com/go/ProtiumX1.

“Protium X1 marks the third generation of Cadence’s prototyping platforms using Xilinx FPGA devices. As part of our long-term business partnership, Xilinx and Cadence have closely collaborated to enable Cadence’s software frontend to work seamlessly with Xilinx Vivado Design Suite backend,” said Hanneke Krekels, senior director of Test, Measurement and Emulation, Xilinx, Inc. “Cadence’s Protium X1 FPGA-based prototyping platform is positioned to deliver multi-MHz performance for billion gate designs using our Virtex UltraScale VU440 devices, which deliver a 2.2x increase in device density and 21 percent more I/O, making it ideally suited for scalable enterprise prototyping in the datacenter.”

Architected from the ground up to provide extreme scalability and flexibility in a data center-optimized form factor, the new Protium X1 platform is the ideal solution for pre-silicon software development for high-speed billion-gate designs. The platform eliminates the need to cut down designs in size for FPGA-based prototyping, while enabling hardware/software regressions at higher speed with less debug and full system validation with real-world interfaces like USB and Ethernet.

The new Protium X1 platform offers:

  • Scalable performance: The platform’s new partitioning and interconnect technology enables the best possible performance and early firmware and software development, enabling customers to achieve up to 5MHz on billion-gate designs and up to 100MHz for single-FPGA designs.
  • Scalable capacity: The platform features an advanced blade architecture that enables customers to scale up to 32 racks and 1,536 FPGAs to handle large, multi-billion-gate designs that are typical for AI, 5G and graphics applications.
  • Fast prototype bring-up: The platform’s unified compile with the Protium S1 desktop prototyping platform and the Palladium® Z1 enterprise emulation platform, and the new and enhanced memory modeling and implementation capabilities, including support for UFS 2.0, HMB2 and LPDDR5, allow designers to transition from emulation to prototyping in days, enabling earlier firmware development.
  • Advanced debug capabilities: The platform offers new productivity and throughput-enhancing features including a new high-performance data capture card, which captures thousands of signals for 10s of millions of clock cycles in real time. Additionally, it includes a new Prototyping Full Visibility capability that provides dynamic access to all signals without recompilation, improving overall verification throughput.
  • Multi-user functionality: The platform offers customers more flexibility and greater system utilization by offering single-FPGA granularity, allowing users to run jobs on the exact number of FPGAs they need while other jobs run simultaneously within the system, which can be used for storage, automotive, image, consumer and medical applications.

“The Protium X1 platform is a breakthrough solution which augments classic desktop prototyping with true flexible and scalable enterprise prototyping required to handle the large designs for today’s applications such as AI and 5G,” said Paul Cunningham, corporate vice president and general manager of the System & Verification Group at Cadence. “For the first time, billion-gate designs can be executed at up to 5MHz, while the unified front-end with the Palladium Z1 platform assures fast design bring-up. With the Protium X1 platform, customers can now experience the same benefits they achieved from the desktop in the data center.”

1 | 2  Next Page »



Review Article Be the first to review this article
Aldec

Featured Video
Latest Blog Posts
Graham BellSilvaco Nanometer Newsbyte
by Graham Bell
230 Power Device Simulations using Silvaco TCAD
Colin WallsEmbedded Software
by Colin Walls
Low power modes
Jobs
Electrical Engineer for SECOND SIGHT MEDICAL PRODUCTS at Sylmar, California
Product Applications Engineer for DiCon Fiberoptics, Inc. at Richmond, California
Nano-Optics Process Engineer for DiCon Fiberoptics, Inc. at Richmond, California
Electrical Engineer ‐  ASIC Layout  for SECOND SIGHT MEDICAL PRODUCTS at Sylmar, California
Lead Validation Engineer for Alcon Research, LLC. at Johns Creek, Georgia
Principal Software Engineer (Middleware) for Alcon Research, LLC. at Lake Forest, California
Upcoming Events
Embedded Systems Conference (ESC) Silicon Valley at San Jose Convention Center San Jose CA - Aug 27 - 29, 2019
Tech Symposium on RISC-V at Hotel Daniel Herzlia Tel Aviv Israel - Sep 5, 2019
PCB West 2019 at santa clara convention center Santa Clara CA - Sep 9 - 12, 2019
SEMICON Taiwan 2019 at TaiNEX Taipei Taiwan - Sep 18 - 20, 2019



Internet Business Systems © 2019 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise